NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 88

• Manufacturer Part Number: NH82801HEM S LB9B
• Manufacturer: Intel

Specifications of NH82801HEM S LB9B

• Lead Free Status / RoHS Status: Compliant

2.26
2.26.1
Table 30.
88
GNT1#/GPIO51
HDA_SDOUT
HDA_SYNC
GPIO20
GNT2#
GNT3#
Signal
Pin Straps
Functional Straps
The following signals are used for static configuration. They are sampled at the rising
edge of PWROK to select configurations (except as noted), and then revert later to their
normal usage. To invoke the associated mode, the signal should be driven at least four
PCI clocks prior to the time it is sampled.
Intel
configure specific functions within the ICH8 and (G)MCH very early in the boot process
before BIOS or software intervention. When Descriptor Mode is enabled, the ICH8 will
read Soft Strap data out of the SPI device prior to the de-assertion of reset to both the
Manageability Engine and the Host system. Refer to
Descriptor Mode and
settings
Functional Strap Definitions (Sheet 1 of 2)
XOR Chain Entrance / PCI
Top-Block Swap Override
ESI Strap (Server Only)
®
PCI Express Port Config
PCI Express Port Config
Express* Port Config 1,
ICH8 has implemented a new feature called Soft Straps. Soft Straps are used to
1, bit 0 (Port 1–4)
2, bit 0 (Port 5–6)
bit 1 (Port 1–4)
Reserved
Usage
Section 20.2.5
Rising Edge of
Rising Edge of
Rising Edge of
Rising Edge of
Rising edge of
Rising Edge of
Sampled
PWROK
PWROK
PWROK
PWROK
PWROK
PWROK
When
for more information on Soft Straps and their
Allows entrance to XOR Chain testing when TP3
pulled low at rising edge of PWROK.
When TP3 not pulled low at rising edge of
PWROK, sets bit 1 of RPC.PC (Chipset
Configuration Registers:Offset 224h).This signal
has a weak internal pull-down.
This signal has a weak internal pull-down.
Sets bit 0 of RPC.PC (Chipset Configuration
Registers:Offset 224h)
This signal has a weak internal pull-up.
Sets bit 2 of RPC.PC2 (Chipset Configuration
Registers:Offset 0224h) when sampled low.
This signal has a weak internal pull-down.
NOTE: This signal should not be pulled high
Tying this strap low configures DMI for ESI-
compatible operation. This signal has a weak
internal pull-up.
NOTE: ESI compatible mode is for server
The signal has a weak internal pull-up. If the
signal is sampled low, this indicates that the
system is strapped to the “top-block swap” mode
(Intel
BIOS space). The status of this strap is readable
via the Top Swap bit (Chipset Configuration
Registers:Offset 3414h:bit 0). Note that
software will not be able to clear the Top-Swap
bit until the system is rebooted without GNT3#
being pulled down.
®
platforms only. This signal should not be
pulled low for desktopand mobile.
ICH8 inverts A16 for all cycles targeting
Section 5.23.1.1
Comment
Intel
®
for information on
ICH8 Family Datasheet
Signal Description