NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 747

• Manufacturer Part Number: NH82801HEM S LB9B
• Manufacturer: Intel

Specifications of NH82801HEM S LB9B

• Lead Free Status / RoHS Status: Compliant

Serial Peripheral Interface (SPI)
20
Note:
20.1
Table 143.
Intel
®
ICH8 Family Datasheet
Serial Peripheral Interface
(SPI)
The Serial Peripheral Interface resides in memory-mapped space. This function
contains registers that allow for the setup and programming of devices that reside on
the SPI interface.
All registers in this function (including memory-mapped registers) must be addressable
in byte, word, and dword quantities. The software must always make register accesses
on natural boundaries (i.e., DWord accesses must be on DWord boundaries; word
accesses on word boundaries, etc.) In addition, the memory-mapped register space
must not be accessed with the LOCK semantic exclusive-access mechanism. If software
attempts exclusive-access mechanisms to the SPI memory-mapped space, the results
are undefined.
Serial Peripheral Interface Memory-Mapped
Configuration Registers
The SPI Host Interface registers are memory-mapped in the RCRB Chipset Register
Space with a base address (SPIBAR) of 3020h and are located within the range of
3020h to 30FFh. The individual registers are then accessible at SPIBAR + Offset as
indicated in
These memory mapped registers must be accessed in byte, word, or DWord quantities.
Serial Peripheral Interface (SPI) Register Address Map
(SPI Memory Mapped Configuration Registers) (Sheet 1 of 2)
SPIBAR +
00h–03h
04h–05h
06h–07h
08h–0Bh
0Ch–0Fh
10h–13h
50h–53h
54h–57h
58h–5Bh
60h–63h
64h–73h
74h–77h
14h–4Fh
5Ch–5F
Offset
Table
Mnemonic
FDATA0
FDATAN
FADDR
FRACC
FREG0
FREG1
FREG2
FREG3
HSFS
HSFC
BFPR
FPR0
—
—
143.
BIOS Flash Primary Region
Hardware Sequencing Flash Status
Hardware Sequencing Flash Control
Flash Address
Reserved
Flash Data 0
Flash Data N
Flash Region Access Permissions
Flash Region 0
Flash Region 1
Flash Region 2
Flash Region 3
Reserved
Flash Protected Range 0
Register Name
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
Default
0000h
0000h
—
RO, R/WC,
RO, R/WL
Access
R/WS
R/WL
R/WL
R/W,
R/W
R/W
R/W
RO
RO
RO
RO
RO
—
—
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