NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 510

• Manufacturer Part Number: NH82801HEM S LB9B
• Manufacturer: Intel

Specifications of NH82801HEM S LB9B

• Lead Free Status / RoHS Status: Compliant

12.2.5
12.3
12.3.1
Note:
510
AIDR—AHCI Index Data Register (D31:F2)
Address Offset: Primary: BAR + 14h
Default Value:
This register is available only when CC.SCC is not 01h.
Serial ATA Index/Data Pair Superset Registers
All of these I/O registers are in the core well. They are exposed only when CC.SCC is
01h
(i.e., IDE programming interface) and the controller is not in combined mode. These
are Index/Data Pair registers that are used to access the SerialATA superset registers
(SerialATA Status, SerialATA Control and SerialATA Error). The I/O space for these
registers is allocated through SIDPBA. Locations with offset from 08h to 0Fh are
reserved for future expansion. Software-write operations to the reserved locations shall
have no effect while software-read operations to the reserved locations shall return 0.
SINDX—SATA Index Register (D31:F5)
Address Offset: SIDPBA + 00h
Default Value:
These are Index/Data Pair Registers that are used to access the SSTS, SCTL, and
SERR. The I/O space for these registers is allocated through SIDPBA.
31:16
31:0
15:8
7:0
Bit
Bit
Data (DATA)— R/W. This Data register is a “window” through which data is read or
written to the AHCI memory mapped registers. A read or write to this Data register
triggers a corresponding read or write to the memory mapped register pointed to by
the Index register. The Index register must be setup prior to the read or write to this
Data register.
Note that a physical register is not actually implemented as the data is actually stored
in the memory mapped registers.
Since this is not a physical register, the “default” value is the same as the default value
of the register pointed to by Index.
Reserved
controller at which the port-specific SSTS, SCTL, and SERR registers are located.
00h = Primary Master (Port 0)
01h = Primary Slave (Port 2)
02h = Secondary Master (Port 1)
03h = Secondary SLave (Port 3)
All other values are Reserved.
Register Index (RIDX)— R/W. This Index field is used to specify one out of three
registers currently being indexed into.
00h = SSTS
01h = SCTL
02h = SERR
All other values are Reserved
Port Index (PIDX)— R/W. This Index field is used to specify the port of the SATA
All bits undefined
00000000h
Description
Description
Attribute:
Size:
Attribute:
Size:
SATA Controller Registers (D31:F2)
R/W
32 bits
R/W
32 bits
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ICH8 Family Datasheet