NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 511

• Manufacturer Part Number: NH82801HEM S LB9B
• Manufacturer: Intel

Specifications of NH82801HEM S LB9B

• Lead Free Status / RoHS Status: Compliant

SATA Controller Registers (D31:F2)
12.3.2
Note:
Intel
®
ICH8 Family Datasheet
SDATA—SATA Index Data Register (D31:F5)
Address Offset: SIDPBA + 04h
Default Value:
These are Index/Data Pair Registers that are used to access the SSTS, SCTL, and
SERR. The I/O space for these registers is allocated through SIDPBA.
31:0
Bit
Data (DATA)— R/W. This Data register is a “window” through which data is read or
written to the memory mapped registers. A read or write to this Data register triggers a
corresponding read or write to the memory mapped register pointed to by the Index
register. The Index register must be setup prior to the read or write to this Data
register.
Note that a physical register is not actually implemented as the data is actually stored
in the memory mapped registers.
Since this is not a physical register, the “default” value is the same as the default value
of the register pointed to by Index.
All bits undefined
Description
Attribute:
Size:
R/W
32 bits
511