NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 319
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NH82801HEM S LB9B
Manufacturer Part Number
NH82801HEM S LB9B
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LB9B.pdf
(890 pages)
Specifications of NH82801HEM S LB9B
Lead Free Status / RoHS Status
Compliant
- Current page: 319 of 890
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Gigabit LAN Configuration Registers
8.1.23
8.1.24
8.1.25
Intel
®
ICH8 Family Datasheet
CLIST 2—Capabilities List Register 2
(Gigabit LAN—D25:F0)
Address Offset: D0h–D1h
Default Value:
MCTL—Message Control Register
(Gigabit LAN—D25:F0)
Address Offset: D2h–D3h
Default Value:
MADDL—Message Address Low Register
(Gigabit LAN—D25:F0)
Address Offset: D4h–D7h
Default Value:
15:8
15:8
31:0
7:0
6:4
3:1
Bit
Bit
Bit
7
0
Next Capability (NEXT) — RO. Value of 00h indicates the end of the list.
Capability ID (CID) — RO. Indicates the linked list item is a Message Signaled
Interrupt Register.
Reserved
64-bit Capable (CID) — RO. Set to 1 to indicate that the Gb LAN Controller is capable of
generating 64-bit message addresses.
Multiple Message Enable (MME) — RO. Returns 000b to indicate that the Gb LAN
controller only supports a single message.
Multiple Message Capable (MMC) — RO. The Gb LAN controller does not support
multiple messages.
MSI Enable (MSIE) — R/W.
0 = MSI generation is disabled.
1 = The Gb LAN controller will generate MSI for interrupt assertion instead of INTx
Message Address Low (MADDL) — R/W. This field is written by the system to
indicate the lower 32 bits of the address to use for the MSI memory write transaction.
The lower two bits will always return 0 regardless of the write operation.
signaling.
0005h
0080h
See bit description
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
RO
16 bits
R/W, RO
16 bits
R/W
32 bits
319
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