NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 371
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NH82801HEM S LB9B
Manufacturer Part Number
NH82801HEM S LB9B
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LB9B.pdf
(890 pages)
Specifications of NH82801HEM S LB9B
Lead Free Status / RoHS Status
Compliant
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LPC Interface Bridge Registers (D31:F0)
9.6.2.1
Intel
®
ICH8 Family Datasheet
RTC_REGA—Register A (LPC I/F—D31:F0)
RTC Index:
Default Value:
Lockable:
This register is used for general configuration of the RTC functions. None of the bits are
affected by RSMRST# or any other ICH8 reset signal.
6:4
3:0
Bit
7
Update In Progress (UIP) — R/W. This bit may be monitored as a status flag.
0 = The update cycle will not start for at least 488 µs. The time, calendar, and alarm
1 = The update is soon to occur or is in progress.
Division Chain Select (DV[2:0]) — R/W. These three bits control the divider chain.
The division chain itself is reset by RSMRST# to all 0’s and it can also be cleared to 0’s
by firmware thru programming of DV. The periodic event (setting of RTCIS.PF and the
associated interrupt) can be based on the time as measured from RSMRST#
deassertion until a divider reset (DV=’11x’ to ‘010’) is performed by firmware.
DV2 corresponds to bit 6.
010 = Normal Operation
11X = Divider Reset
101 = Bypass 15 stages (test mode only)
100 = Bypass 10 stages (test mode only)
011 = Bypass 5 stages (test mode only)
001 = Invalid
000 = Invalid
Rate Select (RS[3:0]) — R/W. Selects one of 13 taps of the 15 stage divider chain.
The selected tap can generate a periodic interrupt if the PIE bit is set in Register B.
Otherwise this tap will set the PF flag of Register C. If the periodic interrupt is not to be
used, these bits should all be set to 0. RS3 corresponds to bit 3.
0000 = Interrupt never toggles
0001 = 3.90625 ms
0010 = 7.8125 ms
0011 = 122.070 µs
0100 = 244.141 µs
0101 = 488.281 µs
0110 = 976.5625 µs
0111 = 1.953125 ms
1000 = 3.90625 ms
1001 = 7.8125 ms
1010 = 15.625 ms
1011 = 31.25 ms
1100 = 62.5 ms
1101 = 125 ms
1110 = 250 ms
1111= 500 ms
information in RAM is always available when the UIP bit is 0.
0A
Undefined
No
Description
Attribute:
Size:
Power Well:
R/W
8-bit
RTC
371
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