NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 782
NH82801HEM S LB9B
Manufacturer Part Number
NH82801HEM S LB9B
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LB9B.pdf
(890 pages)
Specifications of NH82801HEM S LB9B
Lead Free Status / RoHS Status
Compliant
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20.3.7
20.3.8
782
FREG0—Flash Region 0 (Flash Descriptor) Register
(
Memory Address:GLBAR + 54h
Default Value:
FREG1—Flash Region 1 (BIOS Descriptor) Register
(
Memory Address:GLBAR + 58h
Default Value:
31:29
28:16
15:13
12:0
31:29
28:16
15:13
12:0
GbE LAN Memory Mapped Configuration Registers
GbE LAN Memory Mapped Configuration Registers
Bit
Bit
Reserved
Region Limit (RL): — RO. This field specifies address bits 24:12 for the Region 0
Limit.
The value in this register is loaded from the contents in the Flash
Descriptor.FLREG0.Region Limit.
Reserved
Region Base (RB): — RO. This field specifies address bits 24:12 for the Region 0
Base.
The value in this register is loaded from the contents in the Flash
Descriptor.FLREG0.Region Base.
Reserved
Region Limit (RL): — RO. This field specifies address bits 24:12 for the Region 1
Limit.
The value in this register is loaded from the contents in the Flash
Descriptor.FLREG1.Region Limit
Reserved
Region Base (RB): — RO. This field specifies address bits 24:12 for the Region 1
Base.
The value in this register is loaded from the contents in the Flash
Descriptor.FLREG1.Region Base.
00000000h
00000000h
Description
Description
Attribute:
Size:
Attribute:
Size:
Serial Peripheral Interface (SPI)
RO
32 bits
RO
32 bits
)
)
Intel
®
ICH8 Family Datasheet
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