NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 718
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NH82801HEM S LB9B
Manufacturer Part Number
NH82801HEM S LB9B
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LB9B.pdf
(890 pages)
Specifications of NH82801HEM S LB9B
Lead Free Status / RoHS Status
Compliant
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18.1.32
718
SLCTL—Slot Control Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 58h
Default Value:
15:13
9:8
7:6
Bit
12
11
10
5
4
3
Reserved
Link Active Changed Enable (LACE) — R/W. When set, this field enables generation
of a hot plug interrupt when the Data Link Layer Link Active field (D28:F0/F1/F2/F3/F4/
F5:52h:bit 13) is changed.
0 = Disable.
1 = Enable.
Reserved
Power Controller Control (PCC) — RO.This bit has no meaning for module based
Hot-Plug.
Power Indicator Control (PIC) — R/W. When read, the current state of the power
indicator is returned. When written, the appropriate POWER_INDICATOR_* messages
are sent. Defined encodings are:
Attention Indicator Control (AIC) — R/W. When read, the current state of the
attention indicator is returned. When written, the appropriate
ATTENTION_INDICATOR_* messages are sent. Defined encodings are:
Hot Plug Interrupt Enable (HPE) — R/W.
0 = Disable. Hot plug interrupts based on Hot-Plug events is disabled.
1 = Enables generation of a Hot-Plug interrupt on enabled Hot-Plug events.
Command Completed Interrupt Enable (CCE) — R/W.
0 = Disable. Hot plug interrupts based on command completions is disabled.
1 = Enables the generation of a Hot-Plug interrupt when a command is completed by
Presence Detect Changed Enable (PDE) — R/W.
0 = Hot plug interrupts based on presence detect logic changes is disabled.
1 = Enables the generation of a Hot-Plug interrupt or wake message when the presence
Bits
00b
01b
10b
11b
Bits
00b
01b
10b
11b
the Hot-Plug controller.
detect logic changes state.
0000h
Definition
Reserved
On
Blink
Off
Definition
Reserved
On
Blink
Off
–
59h
Description
Attribute:
Size:
PCI Express* Configuration Registers
R/W, RO
16 bits
Intel
®
ICH8 Family Datasheet
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