TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 102

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TMP86xy48UG/FG

Manufacturer Part Number
TMP86xy48UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP86xy48UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
F/E
Rom Size
32
Ram Size
2K
Driver Led
11
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
1
High-speed Serial Output
2
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
54
Power Supply (v)
2.7 to 3.6
RT clock
RT clock
Internal receive data
RXD pin
RXD pin
Internal receive data
2.11.4 Transfer Rate
2.11.5 Data Sampling
as follows.
transfer clock and transfer rate are determined as follows:
until a start bit is detected in RXD pin input. RT clock starts detecting “L” level of the RXD
pin. Once a start bit is detected, the start bit, data bits, stop bit (s), and parity bit are
sampled at three times of RT7, RT8, and RT9 during one receiver clock interval (RT clock).
(RT0 is the position where the bit supposedly starts). Bit is determined according to
majority rule (The data are the same twice or more out of three samplings).
The baud rate of UART is set of UARTCR1<BRG>. The example of the baud rate shown
When TC5 is used as the UART transfer rate (when UARTCR1<BRG> = “110”), the
The UART receiver keeps sampling input using the clock selected by UARTCR1<BRG>
BRG
000
001
010
011
100
101
Transfer clock =
Transfer rate =
RT0
RT0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
76800 [baud]
38400
19200
9600
4800
2400
16 MHz
Start bit
Start bit
Start bit
Start bit
Figure 2.11.4 Data Sampling
Transfer clock
Table 2.11.2 Transfer Rate
TTREG5 set value
TC5 source clock
16
86FM48-98
Source Clock
a) Without noise rejection circuit
38400 [baud]
19200
b) With noise rejection circuit
9600
4800
2400
1200
8 MHz
Bit0
Bit0
Bit0
Bit0
19200 [baud]
9600
4800
2400
1200
4 MHz
600
TMP86FM48
2007-08-24

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