TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 6
TMP86xy48UG/FG
Manufacturer Part Number
TMP86xy48UG/FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP86XY48UGFG.pdf
(207 pages)
Specifications of TMP86xy48UG/FG
Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
F/E
Rom Size
32
Ram Size
2K
Driver Led
11
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
1
High-speed Serial Output
2
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
54
Power Supply (v)
2.7 to 3.6
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Serial interface
10-bit successive approximation type AD converter
Four Key-on wake-up pins
Dual clock operation
Nine power saving operating modes
Wide operating voltage: 1.8 to 3.6 V at 8 MHz/32.768 kHz
• UART/SIO: 1ch
• SIO: 1ch
• I
• Analog input: 16 ch
• Single/dual-clock mode
• STOP mode:
• SLOW 1, 2 mode: Low-power consumption operation using low-frequency clock (32.768 kHz)
• IDLE 0 mode:
• IDLE 1 mode:
• IDLE 2 mode:
• SLEEP 0 mode:
• SLEEP 1 mode:
• SLEEP 2 mode:
2
C bus: 1ch
Oscillation stops. Battery/capacitor back-up.
Port output hold/High-impedance.
CPU stops, and peripherals operate using high-frequency clock of
Time-Base-Timer. Release by falling edge of TBTCR<TBTCK> setting.
CPU stops, and peripherals operate using high-frequency clock.
Release by interruputs.
CPU stops, and peripherals operate using high and low-frequency clock.
Release by interruputs.
CPU stops, and peripherals operate using low-frequency clock of
time-base-timer. Release by falling edge of TBTCR<TBTCK> setting.
CPU stops, and peripherals operate using low-frequency clock.
Release by interrupts.
CPU stops, and peripherals operate using high- and low-frequency clock.
Release by interrupts.
2.7 to 3.6 V at 16 MHz/32.768 kHz
86FM48-2
TMP86FM48
2007-08-24
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