TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 127

• Manufacturer Part Number: TMP86xy48UG/FG
• Manufacturer: Toshiba

Specifications of TMP86xy48UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): F/E
• Rom Size: 32
• Ram Size: 2K
• Driver Led: 11
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: 2
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 54
• Power Supply (v): 2.7 to 3.6

SIO1CR<SIOS>
SIO1TDB
SO1 pin
SIO1CR<SIOS>
SIO1TDB
SO1 pin
SCK1
SCK1
pin
pin
(2) Transfer bit direction
data direction can’t be set individually for transmit and receive operations.
When the data direction is changed, the writing instruction to SIO1CR<SIODIR>
should be executed while the transfer is stopped (when SIO1SR<SIOF> = “0”).
a.
b.
c.
Transfer data direction can be selected by using SIO1CR<SIODIR>. The transfer
Figure 2.13.8 Transfer Bit Direction (Example of transmit mode)
Transmit mode
1. MSB transmit mode
2. LSB transmit mode
1. MSB receive mode
2. LSB receive mode
1. MSB transmit/receive mode
Receive mode
Transmit/receive mode
A
A
MSB transmit mode is selected by setting SIO1CR<SIODIR> to “0”, in which
case the data is transferred sequentially beginning with the most significant
bit (Bit7).
LSB transmit mode is selected by setting SIO1CR<SIODIR> to “1”, in which
case the data is transferred sequentially beginning with the least significant
bit (Bit0).
MSB receive mode is selected by setting SIO1CR<SIODIR> to “0”, in which
case the data is received sequentially beginning with the most significant bit
(Bit7).
LSB receive mode is selected by setting SIO1CR<SIODIR> to “1”, in which
case the data is received sequentially beginning with the least significant bit
(Bit0).
MSB transmit/receive mode are selected by setting SIO1CR<SIODIR> to “0”
in which case the data is transferred sequentially beginning with the most
significant bit (Bit7) and the data is received sequentially beginning with the
most significant (Bit7).
Shift out
Shift out
A7
A0
A6
A1
86FM48-123
(a) MSB transfer
(b) LSB transfer
A5
A2
A4
A3
A3
A4
A2
A5
A1
A6
TMP86FM48
2007-08-24
A0
A7