TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 43

• Manufacturer Part Number: TMP86xy48UG/FG
• Manufacturer: Toshiba

Specifications of TMP86xy48UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): F/E
• Rom Size: 32
• Ram Size: 2K
• Driver Led: 11
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: 2
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 54
• Power Supply (v): 2.7 to 3.6

Figure 1.5.4 Saving/Restoring General-purpose Registers under Interrupt Processing
(3) Interrupt return
program counter (PC) to restarting address, during interrupt service program.
Otherwise returning interrupt causes INTATRAP again. When interrupt acceptance
processing has completed, stacked data for PC
1) and (SP + 2) respectively.
Note: If [RETN] is executed with the above data unaltered, the program returns to the
b.
Interrupt return instructions [RETI]/[RETN] perform as follows.
As for Address Trap interrupt (INTARTAP), it is required to alter stacked data for
instructions are available.
Using data transfer instructions
Example: Save/store register using data transfer instructions
PINTxx:
Saving/restoring general-purpose registers using PUSH/POP instruction
To save only a specific register without nested interrupts, data transfer
address trap area and INTATRAP occurs again.
Main task
1.
2.
Program Counter (PC) and program status word (PSW,
Stack pointer (SP) is incremented by 3.
includes IMF) are restored from the stack.
LD
(interrupt processing)
LD
Interrupt
acceptance
Interrupt return
[RETI]/[RETN] Interrupt Return
(GSAVA), A
A, (GSAVA)
RETI
86FM48-39
Interrupt
service task
Saving
registers
Restoring
registers
L
and PC
;
;
;
Save A register
Restore A register
RETURN
H
are located on address (SP +
TMP86FM48
2007-08-24