TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 146
TMP86xy48UG/FG
Manufacturer Part Number
TMP86xy48UG/FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP86XY48UGFG.pdf
(207 pages)
Specifications of TMP86xy48UG/FG
Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
F/E
Rom Size
32
Ram Size
2K
Driver Led
11
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
1
High-speed Serial Output
2
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
54
Power Supply (v)
2.7 to 3.6
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2.15.2 Register Configuration
(1) AD converter control register 1 (ADCCR1)
(2) AD converter control register 2 (ADCCR2)
(3) AD conversion result register (ADCDR1)
(4) AD conversion result register (ADCDR2)
The AD converter consists of the following four registers:
repeat) in which to perform AD conversion and controls the AD converter as it starts
operating.
converter (Ladder resistor network).
the AD converter.
the AD converter, and then this register is also used to monitor the operating status of
the AD converter.
Figure 2.15.3.
•
•
•
This register selects the analog channels and operation mode (Software start or
This register selects the AD conversion time and controls the connection of the DA
This register is used to store the digital value (Bit9 to bit2) after being converted by
This register is used to store the digital value (Bit1 and bit0) after being converted by
The AD converter control register configurations are shown in Figure 2.15.2 and
AD converter control register 1 (ADCCR1)
AD converter control register 2 (ADCCR2)
AD conversion result register 1/2 (ADCDR1/ADCDR2)
86FM48-142
TMP86FM48
2007-08-24
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