TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 167
TMP86xy48UG/FG
Manufacturer Part Number
TMP86xy48UG/FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP86XY48UGFG.pdf
(207 pages)
Specifications of TMP86xy48UG/FG
Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
F/E
Rom Size
32
Ram Size
2K
Driver Led
11
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
1
High-speed Serial Output
2
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
54
Power Supply (v)
2.7 to 3.6
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2.17.6
Accessing the FLASH Data Memory Area
performed for the 8000H to FFFFH area. Therefore, to write the data memory of FLASH,
the program being executed should be jumped to RAM area or should be jumped to the
support program in BOOT-ROM. For details about the support program in BOOT-ROM,
refer to “2.17.6.2 Method of Using Support Programs in the BOOT-ROM”.
byte. The support program incorporated in the BOOT-ROM can also be used to read data
from the data memory of FLASH area.
“1”), the WINT is set to “1” and the writing is discontinued, and then the warm-up (CPU
wait) for control circuit of Flash memory is executed (The write data counter is also
initialized). If WINT = “1” is detected in the nonmaskable interrupt service routine, a write
is not completed successfully. So, it is necessary to try a write again. The warm-up period is
2
data buffer, if an interrupt generates, the specified page of FLASH is not written. (It keeps
previous data.)
Note 1: After 64 bytes are written to the temporary data buffer, the generating of an interrupt may
Note 2: During the warm-up period for Flash memory (CPU wait), the peripheral circuits
Note 3: When write the data to Flash memory from RAM area, disable all the nonmaskable
10
During the writing to the data memory of FLASH area, neither a read nor fetch can be
An LD instruction can be used to read data from the data memory of FLASH area byte by
If a nonmaskable interrupt occurs during a write to the FLASH (EEPSR<BFBUSY> =
/fc (SYSCK = “0”) or 2
cause the writing the page of FLASH to an unexpected value.
continue operating, but the CPU stays at a halt until the warm-up is finished. Even if an
interrupt latch is set to “1” by generating of interrupt request, an interrupt sequence
doesn’t start till the end of warm-up. If interrupts occur during a warm-up period with IMF
= “1”, the interrupt sequence which depends on interrupt priority will start after warm-up
period.
interrupt by clearing interrupt master enable flag (IMF) to “0” beforehand. However, in
support program of BOOT-ROM, there is no need to clear the IMF because BOOT-ROM
already has a DI (Disable Interrupt) instruction.
3
/fs (SYSCK = “1”). After 1 to 63 bytes are saved to the temporary
86FM48-163
TMP86FM48
2007-08-24
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