TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 95

• Manufacturer Part Number: TMP86xy48UG/FG
• Manufacturer: Toshiba

Specifications of TMP86xy48UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): F/E
• Rom Size: 32
• Ram Size: 2K
• Driver Led: 11
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: 2
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 54
• Power Supply (v): 2.7 to 3.6

2.10.3
Table 2.10.1 Source Clock (Internal clock) for Timer/Counter 5 (Example: at fc = 16 MHz)
Function
divider output, and PWM output mode.
(1) Timer mode
(2) Event counter mode
TC5CK
000
001
010
011
The timer/counter 5 has four operating modes: timer, event counter, programmable
compared with the contents of up counter. If a match is found, an INTTC5 interrupt is
generated and the up-counter is cleared to “0”. Counting up resumes after the
up-counter is cleared.
clock).
match is found, an INTTC5 interrupt is generated and the counter is cleared. Counting
up resumes after the up counter is cleared. The minimum input pulse width of the TC5
pin is shown in Table 2.10.2. Two or more machine cycles are required for both the “H”
and “L” levels of the pulse width.
detected and INTTC5 interrupt is not generated when the pulse is still in a falling
state.
“H” width
“L” width
In this mode, the internal clock is used for counting up. The contents of TC5DR is
In this mode, events are counted on the rising edge of the TC5 pin input (External
The contents of the TC5DR is compared with the contents of the up counter. If a
Match detect is executed on the falling edge of the TC5 pin. A match can not be
Resolution
128.0
[µs]
8.0
2.0
0.5
Table 2.10.2 Timer/Counter 5 External Clock Source
DV7CK = 0
NORMAL1/2, IDLE1/2 Mode
NORMAL1/2, IDLE1/2 Mode
Maximum
Setting
32.6
Time
[ms]
2.0
0.510
0.128
2
2
3
3
/fc
/fc
Minimum Input Pulse Width [s]
86FM48-91
Resolution
244.14
[µs]
8.0
2.0
0.5
DV7CK = 1
Maximum
Setting
SLOW1/2, SLEEP1/2 Mode
62.3
Time
[ms]
2.0
0.510
0.128
Resolution
244.14
2
2
[µs]
3
3
/fs
/fs
−
−
−
SLOW1/2 Mode
Maximum
Setting
Time
[ms]
62.3
−
−
−
TMP86FM48
2007-08-24