TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 105

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TMP86xy48UG/FG

Manufacturer Part Number
TMP86xy48UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP86xy48UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
F/E
Rom Size
32
Ram Size
2K
Driver Led
11
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
1
High-speed Serial Output
2
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
54
Power Supply (v)
2.7 to 3.6
RXD pin
Shift register
RDBUF
UARTSR<RBFL>
INTRXD
RBFL = “H”
RXD pin
UARTSR<OERR>
INTRXD
Shift register
RDBUF
(3) Overrun error
(4) Receive data buffer full
overrun error flag UARTSR<OERR> is set to “1”. In this case, the receive data is
discarded; data in RDBUF are not affected. The UARTSR<OERR> is cleared to “0”
when the RDBUF is read after reading the UARTSR.
UARTSR<RBFL>. The UARTSR<RBFL> is cleared to “0” when the RDBUF is read
after reading the UARTSR.
When all bits in the next data are received while unread data are still in RDBUF,
Loading the received data in RDBUF sets receive data buffer full flag
xxx0**
xxx0**
yyyy
yyyy
Figure 2.11.8 Generation of Receive Buffer Full
Figure 2.11.7 Generation of Overrun Error
Final bit
Final bit
86FM48-101
xxxx0*
xxxx0*
Stop
Stop
1xxxx0
1xxxx0
xxxx
Reading UARTSR then
RDBUF clears OERR.
Reading UARTSR then
RDBUF clears RBFL.
TMP86FM48
2007-08-24

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