TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 39

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TMP86xy48UG/FG

Manufacturer Part Number
TMP86xy48UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP86xy48UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
F/E
Rom Size
32
Ram Size
2K
Driver Led
11
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
1
High-speed Serial Output
2
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
54
Power Supply (v)
2.7 to 3.6
b.
Individual interrupt enable flags (EF
Setting the corresponding bit of an individual interrupt enable flag to “1” enables
acceptance of its interrupt, and setting the bit to “0” disables acceptance. The
individual interrupt enable flags (EF
(address: 002C
instruction. During reset, all the individual interrupt enable flags (EF
initialized to “0” and all maskable interrupts are not accepted until they are set to “1”.
Note: Before manipulating EF, be sure to clear IMF (Interrupt disabled). Then set IMF
Each of these flags enables and disables the acceptance of its maskable interrupt.
Example 1: Enables interrupts individually and sets IMF
Example 2: C compiler description example
newly again after operating on the interrupt enables flag (EF). Normally, IMF is clear
to “0” automatically on service routine. When IMF is set to “1” for using a multiple
interrupt on service routine, be sure to process as is the case with EF.
H
, 003A
DI
LD
LDW
EI
unsigned int _io (3AH) EIRL;
_DI ( );
EIRL = 10100000B;
_EI ( );
H
to 003B
(EIRE), 00001100B
(EIRL),
0110100010100000B
86FM48-35
H
23
in SFR), and can be read and written by an
23
to EF
to EF
4
)
4
) are located on EIRE, EIRL to EIRH
;
;
;
;
;
IMF ← 0
EF
EF
Note: IMF is not set.
IMF ← “1”
/* 3AH shows EIRL address */
19
14
, EF
, EF
18
13
, EF
← “1”
11
, EF
7
, EF
23
TMP86FM48
2007-08-24
to EF
5
← “1”
4
) are

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