TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 183

• Manufacturer Part Number: TMP86xy48UG/FG
• Manufacturer: Toshiba

Specifications of TMP86xy48UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): F/E
• Rom Size: 32
• Ram Size: 2K
• Driver Led: 11
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: 2
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 54
• Power Supply (v): 2.7 to 3.6

11. The 15th through the m’th bytes are the password data. The number of passwords
12. The receive data in the m’th + 1 through n’th − 2 byte are received as binary data
13. The n’th − 1 and the n’th bytes are the SUM value that is sent to the controller in
14. After sending the SUM, the device waits for the next operation command data.
is the data (N) indicated by the password count storage address. The password
data are compared for N entries beginning with the password comparison start
address. The controller should send N bytes of password data to the device. If the
passwords do not match, the device stops UART function without returning error
code to the controller. If the data of addresses from FFE0H to FFFFH are all
“FFH”, the comparison of passwords is not executed because the device is
considered as a blank product.
in Intel Hex format. No received data are echoed back to the controller. The data
which is not the start mark (3AH for “:”) in Intel Hex format is ignored and does
not send an error code to the controller until the device receives the start mark.
After receiving the start mark, the device receives the data record, that consists of
length of data, address, record type, writing data and checksum. After receiving
the checksum of data record, the device waits the start mark data (3AH) again.
The data of data record is temporarily stored to RAM and then, is written to
specified FLASH memory by page (64 bytes) writing. For details of an
organization of FLASH, refer to “2.19.7 Serial PROM Mode”. Since after receiving
an end record, the device starts to calculate the SUM, the controller should wait
the SUM after sending the end record. If receive error or Intel Hex format error
occurs, the device stops UART function without returning error code to the
controller.
order of the upper byte and the lower byte. For details on how to calculate the
SUM, refer to “2.19.9 Checksum (SUM)”. The SUM calculation is performed after
detecting the end record, but the calculation is not executed when receive error or
Intel Hex format error has occurred. The time required to calculate the SUM of
the 32 Kbytes of FLASH memory area is approximately 100 ms at fc = 16 MHz.
After the SUM calculation, the device sends the SUM data to the controller. After
sending the end record, the controller can judge that the transmission has been
terminated correctly by receiving the checksum.
86FM48-179
TMP86FM48
2007-08-24