TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 99

• Manufacturer Part Number: TMP86xy48UG/FG
• Manufacturer: Toshiba

Specifications of TMP86xy48UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): F/E
• Rom Size: 32
• Ram Size: 2K
• Driver Led: 11
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: 2
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 54
• Power Supply (v): 2.7 to 3.6

UART control register
UARTCR2
(1FDE
UARTCR1
(1FDD
2.11.2 Control
H
)
H
)
Note 1: When operations are disabled by setting TXE and RXE bit to “0”, the setting becomes valid when data
Note 2: The transmit clock and the parity are common to transmit and receive.
Note 3: UARTCR1<RXE> and UARTCR1<TXE> should be set to “0” before UARTCR1<BRG> is changed
Note: When UARTCR2<RXDNC> = “01”, pulses longer than 96/fc [s] are always regarded as signals; when
operating status can be monitored using the UART status register (UARTSR).
TXE
7
7
STOPBR
UART is controlled by the UART control registers (UARTCR1, UARTCR2). The
RxDNC
EVEN
STBT
BRG
RXE
TXE
PE
UARTCR2<RXDNC> = “10”, longer than 192/fc [s]; and when UARTCR2<RXDNC> = “11”, longer than 384/fc [s]
transmit or receive complete. When the transmit data is stored in the transmit data buffer, the data are not
transmitted. Even if data transmit is enabled, until new data are written to the transmit data buffer, the
current data are not transmitted.
RXE
6
6
Selection of RXD input noise
rejection time
Receive stop bit length
Transfer operation
Receive operation
Transmit stop bit length
Even-numbered parity
Parity addition
Transmit clock select
STBT
5
5
EVEN
Figure 2.11.2 UART Control Register
4
4
PE
3
3
86FM48-95
2
2
000: fc/13 [Hz]
001: fc/26
010: fc/52
011: fc/104
100: fc/208
101: fc/416
110: TC5 (INTTC5)
111: fc/96
RXDNC
00: No noise rejection (Hysteresis input)
01: Rejects pulses shorter than 31/fc [s] as noise
10: Rejects pulses shorter than 63/fc [s] as noise
11: Rejects pulses shorter than 127/fc [s] as noise
0: Disable
1: Enable
0: Disable
1: Enable
0: 1 bit
1: 2 bits
0: Odd-numbered parity
1: Even-numbered parity
0: No parity
1: Parity
0: 1 bit
1: 2 bits
BRG
1
1
STOPBR
0
0
(Initial value: **** *000)
(Initial value: 0000 0000)
TMP86FM48
2007-08-24
Write
Write
only
only