TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 65

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TMP86xy48UG/FG

Manufacturer Part Number
TMP86xy48UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP86xy48UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
F/E
Rom Size
32
Ram Size
2K
Driver Led
11
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
1
High-speed Serial Output
2
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
54
Power Supply (v)
2.7 to 3.6
2.4
fc/2
fc/2
fc/2
fc/2
2.4.1
Internal reset
23
21
19
17
or fs/2
or fs/2
or fs/2
or fs/2
Watchdog Timer (WDT)
endless looping caused by noise or the like, or deadlock and resume the CPU to the normal
state.
or a non-maskable “interrupt request”. However, selection is possible only once after reset. At
first the “reset request” is selected.
timer to generate an interrupt at fixed intervals.
Note: Care must be given in system design so as to protect the watchdog timer from disturbing
The watchdog timer is a fail-safe system to rapidly detect the CPU malfunctions such as
The watchdog timer signal for detecting malfunction can be selected either a “reset request”
When the watchdog timer is not being used for malfunction detection, it can be used as a
Watchdog Timer Configuration
15
13
11
9
Clear
noise. Otherwise the Watchdog Timer may not fully exhibit its functionality.
WDTT
A
B
C
D
MPX
2
S
WDTEN
0034
Y
WDTCR1
Clock
S
H
Figure 2.4.1 Watchdog Timer Configuration
Q
R
Watchdog timer control registers
Binary counters
Writing disable
code
1
Controller
2
86FM48-61
Overflow
Writing clear
code
0035
WDTCR2
H
WDT output
WDTOUT
signal from T.G
Reset release
Interrupt request
R
S Q
MPX: Multiplexer
TMP86FM48
2007-08-24
Reset request
INTWDT

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