tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 119

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
8 TMUX Registers
Table 125. TMUX_B2ECNT_17_16 and TMUX_B2ECNT_15_0, Receive B2 Error Counts (RO)
Table 126. TMUX_B3ECNT[1—3], Receive B3 Error Counts (RO)
Agere Systems Inc.
0x40067—
Address
0x4006A
0x4006B
0x40069
Address
0x40067
0x40068
15:0
15:0
15:0
Bit
15:2
15:0
Bit
1:0
TMUX_B3ECNT1[15:0] Receive High-speed B3 Error Count for Port 1. Counts
TMUX_B3ECNT2[15:0] Receive High-speed B3 Error Count for Port 2. Counts
TMUX_B3ECNT3[15:0] Receive High-speed B3 Error Count for Port 3. Counts
TMUX_B2ECNT[17:16]—
TMUX_B2ECNT[15:0]
(continued)
Name
Name
—
the number of B3 errors in the receive STS-3/STM-1
(AU-4) frame for port 1. Only counter value 1 is valid in
AU-4 mode. This counter can either count actual BIP errors
or block errors; see TMUX_BITBLKB3
counter holds at its maximum value or rolls over depending
on the value of SMPR_SAT_ROLLOVER
transfers its internal count to a holding register when
SMPR_PMRESET
the number of B3 errors in the receive STS-3/STM-1
(AU-4) frame for port 2. Only counter value 1 is valid in
AU-4 mode. This counter can either count actual BIP errors
or block errors; see TMUX_BITBLKB3
counter holds at its maximum value or rolls over depending
on the value of SMPR_SAT_ROLLOVER and transfers its
internal count to a holding register when SMPR_PMRESET
transitions from a logic 0 to 1.
the number of B3 errors in the receive STS-3/STM-1
(AU-4) frame for port 3. Only counter value 1 is valid in
AU-4 mode. This counter can either count actual BIP errors
or block errors; see TMUX_BITBLKB3
counter holds at its maximum value or rolls over depending
on the value of SMPR_SAT_ROLLOVER and transfers its
internal count to a holding register when SMPR_PMRESET
transitions from a logic 0 to 1.
Reserved.
Receive High-speed B2 Error Count. Counts the
number of B2 errors in the received STS-3/STM-1
(AU-4) frame. This counter can either count actual BIP
errors or block errors; see TMUX_BITBLKB2
(Table
rolls over depending on the value of
SMPR_SAT_ROLLOVER and transfers its internal
count to a holding register when SMPR_PMRESET
transitions from a logic 0 to 1.
95). This counter holds at its maximum value or
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
(Table
Function
65) transitions from a logic 0 to 1.
Function
TMXF28155/51 Super Mapper
(Table
(Table
(Table
(Table
95). This
95). This
95). This
67) and
Default
0x0000
Default
Reset
0x000
0x0000
0x0000
0x0000
Reset
0
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