tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 587
tmxf28155
Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet
1.TMXF28155.pdf
(606 pages)
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Preliminary Data Sheet
May 2001
26 Applications
Contents
26 Applications ..................................................................................................................................................... 587
27 Change History ............................................................................................................................................... 604
Figures
Figure 102. Switching Application of the Super Mapper....................................................................................... 588
Figure 103. Transport Application of the Super Mapper....................................................................................... 588
Figure 104. Super Mapper Switching Mode for Framer in Concentration Highway
Figure 105. Super Mapper Switching Mode for Framer in Parallel System Bus Configuration ............................ 597
Figure 106. Super Mapper Switching Mode CHI Configuration with Byte-Synchronous VT Mapping Enabled ... 598
Figure 107. Super Mapper Byte-Synchronous Transport Mode: Passive Performance Monitoring..................... 599
Figure 108. Super Mapper Byte-Synchronous Transport Mode: Intrusive Performance Monitoring.................... 600
Tables
Table 628. Change History .................................................................................................................................... 604
Agere Systems Inc.
26.1 Application Diagrams .............................................................................................................................. 588
26.2 High-Speed Line Interfaces and Clock and Data Recovery ................................................................... 589
26.3 Multiplex Section Protection (MSP 1 + 1) ............................................................................................... 589
26.4 Path Termination Function ..................................................................................................................... 590
26.5 STS-3/STM-1 MUX-DeMUX ................................................................................................................... 591
26.6 Telecom Bus Interface—Interfacing to Mate Devices ............................................................................ 591
26.7 SPE/AU-3 Mapper (DS3 Mapper) .......................................................................................................... 591
26.8 VT/VC Mapper ........................................................................................................................................ 592
26.9 M13/M23 Multiplexer .............................................................................................................................. 593
26.10 Cross Connect Block ............................................................................................................................ 594
26.11 Digital Jitter Attenuator ......................................................................................................................... 595
26.12 Test Pattern Generator ......................................................................................................................... 595
26.13 28-Channel Framer .............................................................................................................................. 596
26.14 Line Decoder/Encoder .......................................................................................................................... 601
26.15 Receive Frame Aligner/Transmit Frame Formatter .............................................................................. 601
26.16 Receive Performance Monitor .............................................................................................................. 601
26.17 Signaling Processor .............................................................................................................................. 602
26.18 Facility Data Link (FDL) Processor ....................................................................................................... 602
26.19 HDLC Unit ............................................................................................................................................ 603
26.20 System Interface.....................................................................................................................................603
26.2.1 Receive Direction ......................................................................................................................... 589
26.2.2 Transmit Direction ......................................................................................................................... 589
26.3.1 Pointer Interpreter ........................................................................................................................ 589
26.8.1 Receive Direction ......................................................................................................................... 592
26.8.2 Transmit Direction ........................................................................................................................ 593
26.9.1 Receive Direction ......................................................................................................................... 593
26.9.2 Transmit Direction ........................................................................................................................ 594
Interface (CHI) Configuration............................................................................................................. 596
Applications
Table of Contents
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
TMXF28155/51 Super Mapper
Page
Page
Page
587
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