tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 29

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

May 2001
3 Pin Information
Table 14. Microprocessor Interfaces (continued)
Table 15. General Purpose Interface
Agere Systems Inc.
AB8
AB9
T24
T25
Pin
W5
R5
U5
V5
AB24
AC25
U23
Pin
IC3STATEN
Symbol
PMRST
TRSTN
TMSN
RSTN
TDO
TCK
TDI
APS_INTN
Symbol
INTN
DTN
(continued)
Type
—
—
—
—
—
—
—
—
Type
—
—
—
Pull down
Pull down
Pull up
Pull up
Pull up
Pull up
Open Drain
Open Drain
Open Drain
I/O
I/O
O
I
I
I
I
I
I
I/O
O
O
O
Reset. Global reset, active-low. Initializes all internal registers
to their default state.
Performance Monitor Reset. May be configured as an input
and then used to directly reset all the counters associated with
DS1/E1 performance monitoring. If an internal PM reset is
used, PMRST is configured as an output that indicates when a
PM reset occurred.
Test Clock. This signal provides timing for the boundary scan
and TAP controller. This signal should be static, except during
boundary scan testing.
Test Data In. Data input for the boundary scan; sampled on
the rising edge of TCK.
Test Mode Select (Active-Low). Controls boundary scan test
operations. TMS is sampled on the rising edge of TCK.
Test Reset (Active-Low). This signal is an asynchronous
reset for the TAP controller.
Test Data Out. Updated on the falling edge of TCK. The TDO
output is high impedance, except when scanning out test data.
Global Output Enable. All output and bidirectional buffers will
be high impedance when this input is low. Normally pulled high
internally.
Data Transfer Acknowledge. In synchronous CPU mode,
DTA goes low at 4th cycle for write or 5th cycle for read,
resulting in a fixed 2 wait-states for writes and 3 wait-states
for reads. In asynchronous P mode, after qualification of AS
and DS by TLSC52 clock, DTA goes low for two TLSC52
clock cycles for writes and three TLSC52 clock cycles for
reads. DTA goes high, along with the rising edge of AS.
Interrupt. Super Mapper interrupt request, active-low. An
open drain output should be connected to an external pull-up
resistor.
APS Interrupt. Automatic protection switch interrupt request,
active-low. An open drain output should be connected to an
external pull-up resistor.
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Description
Description
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