tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 58

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
5 Timing Characteristics
Table 53. Microprocessor Interface Asynchronous Write Cycle Specifications
(See Figure 16 on page 57
* Simulation results.
† Falling edges of ADSN and DSN determine falling edge of DTN.
‡ DTN fall is variable, depending on the block selected for access, and may be longer than the typical maximum specified.
§ Rising edge of ADSN determines rising edge of DTN.
Note: Specifications are valid for 50 MHz MPCLK with MPMODE = 0. Address strobe (ADSN) and chip select
58
t
t
t
Symbol
ADSRDTR
t
t
t
t
t
DSRRWR
t
t
RWFDSF
CSFDTR
CSFDSF
t
t
DSFDTF
CSRDT3
t
AVADSF
DSNRAI
t
ADSRAI
AVDSF
DVDSF
AICSR
DSRDI
(CSN) may be connected and driven from the same source. In this configuration, the setup and hold times
for ADSN must be satisfied.
CSN Fall to DSN Fall
ADDR Invalid to CSN Rise
ADDR Valid to ADSN Fall
ADSN Rise to ADDR Invalid
ADDR Valid to DSN Fall
DSN Rise to ADDR Invalid
RWN Fall to DSN Fall
DSN Rise to RWN Rise
DATA Valid to DSN Fall
DSN Rise to DATA Invalid
CSN Fall to DTN Rise
DSN Fall to DTN Fall
ADSN Rise to DTN Rise
CSN Rise to DTN 3-state
for the timing diagram.)
Parameter
(continued)
Min Interval (ns)
120
20
20
10
0*
0*
0*
0*
0
0
0
0
0
0
§
Max Interval (ns)
Agere Systems Inc.
280
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May 2001
†‡