tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 395

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tmxf28155

Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet

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tmxf281553BAL3C
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Preliminary Data Sheet
May 2001
17 TMUX Functional Description
17.6.24 B1 Generate and Error Insert
The section bit interleaved parity code (BIP-8) byte (even parity) is used to check for transmission errors over a
section. Its value is calculated over all bits in the previous frame after scrambling and placed in the B1 byte of time
slot 1 before scrambling.
A bit error rate can be inserted on the B1 byte. When TMUX_THSB1ERRINS = 1
byte is inverted each time the microprocessor interface block SMPR_BER_INSRT
asserted.
17.6.25 Scrambler
The outgoing frame will be scrambled with the frame synchronous scrambler of length 127 and generating polyno-
mial x
will be set to 1111111 on the first byte following the last overhead byte in the first row.
For test purposes, the scrambler will be disabled when TMUX_THSSCR = 0
17.6.26 J0 Insert Control
A 16-byte sequence stored in TMUX_TJ0DINS[1—16][7:0]
ing J0 byte if TMUX_THSJ0INS = 1
depends on the value of microprocessor interface block SMPR_OH_DEFLT
0, then all 0s are inserted. If SMPR_OH_DEFLT = 1, then all ones are inserted.
17.6.27 Z0-2, Z0-3 Insert Control
The 2 bytes, Z0-2 and Z0-3, that follow J0 are not scrambled. If TMUX_THSZ0INS = 1
stored in TMUX_TZ02INS[7:0]
TMUX_THSZ0INS = 0, then the value inserted depends on the value of microprocessor interface block
SMPR_OH_DEFLT bit. If SMPR_OH_DEFLT = 0, then all zeros are inserted. If SMPR_OH_DEFLT = 1, then all
ones are inserted.
17.6.28 A2 Error Insert
The TMUX allows, under software control, from 1 to 32 continuous frames to have an inverted A2-1 (0x28 to 0xD7)
pattern in the outgoing frame. The value in TMUX_TA2ERRINS[4:0]
insert errors into while assertion of microprocessor interface block, SMPR_BER_INSRT bit, starts the error inser-
tion process.
Agere Systems Inc.
7
+ x
6
+ 1. The entire STS/STM signal will be scrambled except for the first row of overhead. The scrambler
(Table 111 on pag
(Table 107 on pag
(continued)
e110) and TMUX_TZ03INS[7:0]
e103). If TMUX_THSJ0INS = 0, then the value inserted
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
(Table 133 on page121
(Table
106) specifies the number of frames to
(Table
(Table 106 on page
TMXF28155/51 Super Mapper
(Table 115 on page
(Table 65 on page66
(Table
67) bit. If SMPR_OH_DEFLT =
) will be inserted into the outgo-
(Table
111) will be inserted. If
107), then the values
103).
112), the B1
) bit is
395

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