tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 147
tmxf28155
Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet
1.TMXF28155.pdf
(606 pages)
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Preliminary Data Sheet
May 2001
9 SPE Mapper Registers
Table 160. SPE_ERRCNT1—SPE_ERRCNT6, B3, G1, Bipolar Violation, and Excess Zero Error Count (RO)
Table 161. SPE_PTRCNT1—SPE_PTRCNT3, Receive Pointer Increment and Decrement Count (RO)
Table 162. SPE_RJ1MON_R1—SPE_RJ1MON_R32, Receive J1 Monitor Values (RO)
Agere Systems Inc.
Address
Address
Address
0x30030
0x30031
0x30033
0x30033
0x30034
0x30035
0x30035
0x30036
0x30037
0x30038
0x30039
0x30042
0x30061
—
15:10
15:11
15:11
15:0
15:0
15:8
15:0
15:8
15:0
10:0
10:0
15:0
Bit
7:0
7:0
Bit
9:0
Bit
SPE_BIPOL_CNT[23:16]
SPE_BIPOL_CNT[15:0]
SPE_RJ1DMON[1—64][7:0] Receive J1 Monitor Value. These registers capture
SPE_EXZ_CNT[23:16]]
SPE_EXZ_CNT[15:0]
SPE_STORED_PTR[9:0]
SPE_G1ECNT[15:0]
SPE_B3ECNT[15:0]
SPE_RPTR_DEC[10:0]
SPE_RPTR_INC[10:0]
Name
—
—
Name
Name
—
—
—
(continued)
B3 Error Count. The value of internal running counter is
transferred into this holding register coincident with the
end of a performance monitor interval.
G1 Error Count. The value of internal running counter is
transferred into this holding register coincident with the
end of a performance monitor interval.
Reserved.
Bipolar Coding Violation Occurrence Count. The
value of internal running counter is transferred into this
holding register coincident with the end of a
performance monitor interval.
Reserved.
Excess Zero Occurrence Count. The value of internal
running counter is transferred into this holding register
coincident with the end of a performance monitor
interval.
Reserved.
Stored TU-3 Pointer Location.
Reserved.
Pointer Increment Count from Pointer Interpreter
Block. The value of internal running counter is
transferred into this holding register coincident with
the end of a performance monitor interval.
Reserved.
Pointer Decrement Count from Pointer
Interpreter Block. The value of internal running
counter is transferred into this holding register
coincident with the end of a performance monitor
interval.
a 64-byte sequence from the J1 byte of each frame.
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Function
Function
Function
TMXF28155/51 Super Mapper
Default
Default
0x0000
0x0000
0x0000
0x0000
Default
Reset
Reset
0x000
0x000
0x000
Reset
0x00
0x00
0x00
0x00
00
00
147
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