tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 365

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
17 TMUX Functional Description
The transmit TTOAC allows the users to insert the following overhead bytes: E1, F1, D1—D3, D4—D12, S1, and
E2. Even or odd parity is checked over all bytes. Bytes which are not enabled for insertion are set to an all-ones or
all-zeros stuff value.
The data communication channels D1—D3 or D4—D12 may also be received via the TTOAC interface. In this
mode, the TTOAC channel will comprise a serial 192 kbits/s or a 576 kbits/s data stream.
The insertion (overwrite by TOAC) of programmed S1, F1, J0, Z0-2, and Z0-3 bytes can be enabled via registers.
Automatic insertion of M0/M1 may also be inhibited via registers. A protection switch selects the REI-L value for
insertion to be taken from the protection board rather than from the receive side. The entire APS value or K2[2:0]
can be inserted via writable registers. Automatic RDI insertion is supported with individual inhibit for each contribu-
tor. A protection switch selects the RDI-L value for insertion to be taken from the protection board rather than from
the receive side. B1 and B2 BIP-8 values are calculated and inserted. Both values can be optionally inverted.
Agere Systems Inc.
ttoac sync
ttoac data
ttoac clk
(TIM E SL O T # 3 )
S TS -1 /TU G -3
D E VIC E #3
Figure 22. TMUX TTOAC and RTOAC Timing Diagram
(TIM E SL O T # 2 )
TELECOM BU S
S TS -1 /TU G -3
D E VIC E # 2
Figure 23. High-Level TMUX Interconnect
D EV IC E # 1
S O N E T/SD H IN TE R FA C E
(continued)
(TIM E S L O T # 1 )
HIGH-SPEED
S TS-1 /TU G -3
D S 3
M 13
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
MAPPER
TMUX
SPE
S TS -3 /STM -1
O R STS -1
M A PP E R
V T/TU
TU G -2
TM U X R D I_ P , RE I_ P
T M U X R D I_ L , R EI_ L
V T M PR R D I_ P , R E I_ P
V T M PR R D I_ L , R E I_ L
TMXF28155/51 Super Mapper
5-9004(F)
0784(F)
365