tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 210

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
11 M13/M23 MUX/DeMUX Registers
Table 240. M13_DS2_OOF_R, DS2 Out of Frame Status (RO)
Table 241. M13_DS2_LOF_R, DS2 Loss of Frame Status (RO)
Table 242. M13_DS2_AIS_DET_R, DS2 Alarm Indication Signal Detect Status (RO)
Table 243. M13_DS2_RAI_DET_R, DS2 Remote Alarm Indication Detect Status (RO)
210
Address
Address
Address
Address
0x10031 15:7
0x10032 15:7
0x10033 15:7
0x10034 15:7
6:0
6:0
6:0
6:0
Bit
Bit
Bit
Bit
M13_DS2_OOF[7:1] This register contains the state bits for the DS2 framers. A 1
M13_DS2_LOF[7:1]
M13_DS2_RAI_
M13_DS2_AIS_
DET[7:1]
DET[7:1]
Name
Name
Name
Name
—
—
—
—
Reserved.
indicates out-of-frame.
Reserved.
The M13_DS2_LOFy bit is set if M13_DS2_OOFy
is high continuously for 28 DS3 frame periods (approximately
3 ms). Once set, M13_DS2_LOFy is not cleared until
M13_DS2_OOFy is continuously low for 28 DS3 frame peri-
ods. DS3 frame periods are not counted while M13_DS3_OOF
= 1
Reserved.
The M13_DS2_AIS_DETy bit is set high if the input to the yth
M12 demultiplexer is logic 0 for fewer than 5 clock cycles in
each of two consecutive 840 clock periods and cleared if there
are more than four zeros in each of two consecutive 840-bit
periods.
Reserved.
The M13_DS2_RAI_DETy bit changes state only after the X bit
in the DS1 mode (M13_DS1_E1Ny = 1
RAI bit in the E1 mode is received as the same value for four
consecutive DS2 frames. DS2 frame periods are not counted
while M13_DS3_OOF = 1
M13_DS2_RAI_DETy is set to the inverse of the X bit. In the
E1 mode, it is set equal to the RAI bit.
(Table
(continued)
224).
Function
Function
Function
Function
(Table
224). In the DS1 mode,
(Table
263)), or the
(Table
Agere Systems Inc.
240)
May 2001
Default
Default
Default
Default
000000
Reset
Reset
Reset
0x000
Reset
0x000
0x7F
0x00
0x00
0x00
000
—