tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 425

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
19 VT/TU Mapper Functional Description
Contents
19 VT/TU Mapper Functional Description ........................................................................................................... 425
Figures
Figure 38. VT Mapper Interface Diagram ............................................................................................................. 428
Figure 39. VT Mapper Functional Block Diagram................................................................................................. 429
Figure 40. Pointer Interpretation State Diagram................................................................................................... 433
Figure 41. DS1 Mode Gapped Clocking Scheme................................................................................................. 451
Figure 42. E1 Mode Gapped Clocking Scheme ................................................................................................... 451
Figure 43. DS1 Interface ...................................................................................................................................... 451
Figure 44. E1 Interface ......................................................................................................................................... 452
Figure 45. VT Mapper Receive Path Overhead Serial Access Channel .............................................................. 452
Figure 46. VT Mapper Transmit Path Overhead Serial Access Channel ............................................................. 453
Agere Systems Inc.
19.1 VT/TU Mapper Introduction .................................................................................................................... 427
19.2 VT/TU Mapper Features ......................................................................................................................... 427
19.3 VT/TU Mapper Functional Block Diagram .............................................................................................. 428
19.4 VT/TU Mappings ..................................................................................................................................... 430
19.5 VT/TU Locations ..................................................................................................................................... 431
19.6 VT/TU Mapper Receive Path Description ............................................................................................... 432
19.7 VT Demultiplexer (VTDEMUX) ............................................................................................................... 432
19.8 VT Pointer Interpreter (VTPI) .................................................................................................................. 432
19.9 VT Termination (VTTERM) ..................................................................................................................... 435
19.10 Output Signal Selection (OUTSEL) ...................................................................................................... 437
19.11 J2 Byte Monitor and Termination (J2MON) .......................................................................................... 438
19.12 Receive Signaling (RX_VTSIG) ............................................................................................................ 439
19.13 Receive Lower-Order Path Overhead (RX_LOPOH) ........................................................................... 440
19.14 VT/TU Mapper Transmit Path Requirements ....................................................................................... 440
19.15 VT Mapper System Interface Timing .................................................................................................... 451
19.16 VT Mapper Lower-Order Path Overhead Interface Timing ................................................................... 452
19.9.1 V5 Termination ............................................................................................................................. 435
19.9.2 Z6/N2 Termination ....................................................................................................................... 436
19.9.3 Z7/K4 Termination ....................................................................................................................... 436
19.9.4 Payload Termination .................................................................................................................... 437
19.14.1 Input Selector (INSEL) .............................................................................................................. 441
19.14.2 Transmit Elastic Store (TES) ..................................................................................................... 442
19.14.3 Virtual Tributary Generator (VTGEN) ........................................................................................ 442
19.14.4 Pointer Generation .................................................................................................................... 442
19.14.5 VT Multiplexer (VTMUX) ........................................................................................................... 450
19.14.6 Transmit Signaling (TX_VTSIG) ................................................................................................ 450
19.14.7 Transmit Lower Path Overhead (TX_LOPOH) .......................................................................... 450
19.15.1 VT Mapper DS1/E1 Receive Interface (to System Interface) .................................................... 451
19.15.2 VT Mapper DS1/E1 Transmit Interface (from System Interface) ............................................... 452
19.16.1 VT Mapper Receive Path Overhead Interface Description ....................................................... 452
19.16.2 VT Mapper Transmit Path Overhead Interface Description ...................................................... 453
Table of Contents
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
TMXF28155/51 Super Mapper
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Page
425