tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 157

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
10 VT/TU Mapper Registers
Table 173. VT_RMASK[1—28], Receive Masks Per Channel (R/W)
Note: The event and delta bits for these mask bits are in
Agere Systems Inc.
Address Bit
0x2003C
0x20057
—
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
VT_RX_BIP2ERR_M[1—28] Receive BIP-2 Error Mask Bit. If set to a logic 1,
VT_RX_ESOVFL_M[1—28] Receive Elastic Store Overflow Mask Bit. If set to a
VT_RX_VTREI_M[1—28]
VT_SIZERR_M[1—28]
VT_UNEQ_M[1—28]
VT_J2TIM_M[1—28]
VT_LOPS_M[1—28]
VT_ERDI_M[1—28]
VT_APS_M[1—28]
VT_PLM_M[1—28]
VT_LOP_M[1—28]
VT_RDI_M[1—28]
VT_RFI_M[1—28]
VT_AIS_M[1—28]
Name
—
—
(continued)
Reserved.
Receive REI-V Mask Bit. If set to a logic 1,
VT_RX_VTREI_E[1—28] will not contribute to the inter-
rupt.
VT_RX_BIP2ERR_E[1—28] will not contribute to the
interrupt.
logic 1, VT_RX_ESOVFL_E[1—28] will not contribute to
the interrupt.
VT APS Mask Bit. If set to a logic 1, VT_APS_D[1—28]
will not contribute to the interrupt.
ERDI-V Mask Bit. If set to a logic 1, VT_ERDI_D[1—28]
will not contribute to the interrupt.
RDI-V Mask Bit. If set to a logic 1, VT_RDI_D[1—28] will
not contribute to the interrupt.
RFI-V Mask Bit. If set to a logic 1, VT_RFI_D[1—28] will
not contribute to the interrupt.
Reserved.
VT Loss of Phase Sync Mask Bit. If set to a logic 1,
VT_LOPS_D[1—28] will not contribute to the interrupt.
J2 Mismatch Mask Bit. If set to a logic 1,
VT_J2TIM_D[1—28] will not contribute to the interrupt.
VT Payload Label Mismatch Mask Bit. If set to a logic
1, VT_PLM_D[1—28] will not contribute to the interrupt.
VT Unequip Mask Bit. If set to a logic 1,
VT_UNEQ_D[1—28] will not contribute to the interrupt.
VT Size Error Mask Bit. If set to a logic 1,
VT_SIZERR_D[1—28] will not contribute to the interrupt.
AIS-V Mask Bit. If set to a logic 1, VT_AIS_D[1—28] will
not contribute to the interrupt.
LOP-V Mask Bit. If set to a logic 1, VT_LOP_D[1—28]
will not contribute to the interrupt.
Table
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
169.
Function
TMXF28155/51 Super Mapper
Default
Reset
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0
0
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