tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 250

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
12 28-Channel Framer Registers
Table 318. FRM_PMGR8, Performance Monitor Global Register 8 (R/W)
* P = 0x0 for the receive path, and P = 0x1 for the transmit path.
Table 319. FRM_PMGR9, Performance Monitor Global Register 9 (R/W)
* P = 0x0 for the receive path, and P = 0x1 for the transmit path.
Table 320. FRM_PMGR10, Performance Monitor Global Register 10 (R/W)
These bits enable the errored events used to determine errored and severely errored seconds in the CEPT modes.
* P = 0x0 for the receive path, and P = 0x1 for the transmit path.
Table 321. FRM_PMGR11, Performance Monitor Global Register 11 (R/W)
* P = 0x0 for the receive path, and P = 0x1 for the transmit path.
250
Address*
Address*
Address*
Address*
0x80P3A
0x80P37
0x80P38
0x80P39
15:0
15:0 FRM_CSEST[15:0] CEPT Severely Errored Second Threshold for All CEPT
15:0 FRM_CRET[15:0] Continuous Received E-Bit Threshold—Default 991. This
Bit
Bit
Bit
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
FRM_CNOTFAS CEPT Non-FAS Bit Error Enable.
FRM_CSA6_1X CEPT Sa6 = 001x Event Enable.
FRM_CSA6_X1 CEPT Sa6 = 00x1 Event Enable.
FRM_CSA6_E
FRM_CSA6_C
FRM_CCT[15:0]
FRM_CSA6_F
FRM_CSA6_8
FRM_CLMFA
FRM_CEBIT
FRM_CSLIP
FRM_CCRC
FRM_CLOS
FRM_CRFA
FRM_CFAS
FRM_CLFA
FRM_CAIS
Name
Name
Name
Name
CEPT Sa6 = F Enable and Sa5 = 1. (Reception of AIS.)
CEPT Sa6 = E Enable and Sa5 = 1. (FC3 and FC4.)
CEPT Sa6 = C Enable and Sa5 = 1. (LOS/LFA.)
CEPT Sa6 = 8 Enable and Sa5 = 1. (Loss of power.)
CEPT E bit = 0 Event Enable.
CEPT Loss of Multiframe Alignment Enable.
CEPT Loss of Frame Alignment Enable.
CEPT Remote Frame Alarm Enable.
CEPT Slip Enable.
CEPT Loss of Signal Enable.
CEPT Alarm Indication Signal Enable.
CEPT CRC-4 Error Enable.
CEPT FAS Bit Error Enable.
CEPT Excessive CRC Threshold—Default 915. This register
sets the one second CRC threshold at which an excessive CRC
error condition is reported and the one second CRC threshold at
which a reframe may be forced.
register sets the five second continuous E-bit threshold for set-
ting the CRE bit status indication.
Formatted Channels.
(continued)
Function
Function
Function
Function
Agere Systems Inc.
May 2001
Default
0x03DF
Default
Default
0x0000
Default
Reset
0x0393
Reset
Reset
Reset
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1