PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 138
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PEB22554
Manufacturer Part Number
PEB22554
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.PEB22554.pdf
(397 pages)
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TTRF…
DAF…
Clock Mode Register 1 (Read/Write)
Value after RESET: 00
CMR1
DRSS1 ... 0 …
Semiconductor Group
7
DRSS1
DRSS0
0…
1…
The SYPR pin function is selected by PC(1-4).RPC(2-0) = 000.
TTR Register Function
Setting this bit the function of the TTR1-4 registers are changed. A
one in each TTR register will force the XSIGM marker high for the
respective time-slot and controls sampling of the time-slots provided
on pin XSIG. XSIG is selected by PC(1-4).XPC(2-0).
Disable Automatic Freeze
0…
1…
DCO-R Synchronization Clock Source
These bits select the reference clock source for the DCO-R circuitry.
00… receive reference clock generated by the DPLL of channel 1
01… receive reference clock generated by the DPLL of channel 2
10… receive reference clock generated by the DPLL of channel 3
11… receive reference clock generated by the DPLL of channel 4
Note: After Reset all DCO-R circuitries will synchronize on the clock
H
SYPR is latched with the first falling edge of the SCLKR clock.
SYPR is latched with the first rising edge of the SCLKR clock.
Signaling is automaticly frozen if one of the following alarms
Automatic freezing of signaling data is disabled. Updating of the
occured: Loss of Signal (FRS0.LOS), Loss of CAS Frame
Alignment (FRS1.TS16LFA) , or receive slips (ISR3.RSP/N).
signaling buffer is also done if one of the above described alarm
conditions is active. However, updating of the signaling buffer is
stopped if SIC2.FFS is set. Significant only if the serial signaling
access is enabled.
sourced by the DPLL of channel 1 . Each channel have to be
configured individually.
If LIM0.MAS is set the DCO-R circuitry will synchronize on the
clock applied to port SYNC.
RS1
RS0
138
DCS
STF
Operational Description E1
DXJA
0
DXSS
PEB 22554
(x44)
09.98
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