PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 155

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Semiconductor Group
AIS…
LFA…
interface) or logical zeros (dig. interface) in a time interval of T
consecutive pulses, where T is programmable via PCD register.
Total account of consecutive pulses: 16 < T < 4096.
Analog interface: The receive signal level where “no transition” will be
declared is defined by the programmed value of LIM1.RIL2-0.
Recovery:
Analog interface: The bit will be reset in short haul mode when the
incoming signal has transitions with signal levels greater than the
programmed receive input level (LIM1.RIL2-0) for at least M pulse
periods defined by register PCR in the PCD time interval. In long haul
mode addtionally bit RES.6 must be set for at least 250µsec.
Digital interface: The bit will be reset when the incoming data stream
contains at least M ones defined by register PCR in the PCD time
interval.
With the rising edge of this bit an interrupt status bit (ISR2.LOS) will
be set..
The bit will also be set during alarm simulation and reset if FMR0.SIM
is cleared and no alarm condition exists.
Alarm Indication Signal
The function of this bit is determined by FMR0.ALM.
FMR0.ALM = 0:
FMR0.ALM = 1:
The bit will also be set during alarm simulation and reset if FMR0.SIM
is cleared and no alarm condition exists.
With the rising edge of this bit an interrupt status bit (ISR2.AIS) will be
set.
Loss of Frame Alignment
This bit is set when the incoming signal has two or
This bit is set when two or less zeros in the
received bit stream are detected in a time interval
of 250
asynchronous state (FRS0.LFA = 1). The bit will
be reset when no alarm condition is detected
(ETSI).
less Zeros in each of two consecutive double
frame period (512 bits). This bit will be cleared
when each of two consecutive doubleframe
periods contain three or more zeros or when the
frame alignment signal FAS has been found.
(ITU-T: G.775)
155
s and the QuadFALC is in the
Operational Description E1
PEB 22554
09.98