PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 234

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PEB22554

Manufacturer Part Number
PEB22554
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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PEB 22554
Functional Description T1 / J1
7.6
Transmit Path
Compared to the receive paths the inverse functions are performed for the transmit
direction.
The interface to the transmit system highway is realized by two data buses, one for the
data XDI and one for the signaling data XSIG. The time-slot assignment is equivalent to
the receive direction. All unequipped (idle) time-slots will be ignored.
Latching of data is controlled by the System Clock (SCLKX or SCLKR) and the
Synchronous Pulse (SYPX / XMFS) in conjunction with the programmed offset values for
the Transmit Time-slot/Clock-slot Counters XC1/0. The frequency of the working clock
2.048 / 4.096 / 8.192 / 16.384 MHz or 1.544 / 3.088 / 6.176 / 12.352 MHz for the transmit
system interface is programmable by SIC1.SSC1/0 and SIC2.SSC2. Refer also table 18
The received bit stream on ports XDI and XSIG could be multiplexed internally on a
time-slot basis, if enabled by SIC3.TTRF = 1. The data received at port XSIG could be
sampled if the transmit signaling marker XSIGM is active high. Data at port XDI will be
sampled if XSIGM is low for the respective time-slot. Programming the XSIGM marker is
done with registers TTR1-4.
Semiconductor Group
234
09.98

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