PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 164

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

E Bit Error Counter (Read)
EBCL
EBCH
EB15…EB0…
Semiconductor Group
7
7
EB15
EB7
E-Bit Errors
If doubleframe format is selected, FEBEH/L has no function. If CRC-
multiframe mode is enabled, FEBEH/L works as submultiframe error
indication counter (16 bits) which counts zeros in Si-bit position of
frame 13 and 15 of every received CRC multiframe. The error counter
will not roll over.
During alarm simulation, the counter is incremented once per
submultiframe up to its saturation.
Clearing and updating the counter is done according to bit
FMR1.ECM.
If this bit is reset the error counter is permanently updated in the
buffer. For correct read access of the error counter bit DEC.DEBC
has to be set. With the rising edge of this bit updating the buffer will
be stopped and the error counter will be reset. Bit DEC.DEBC will
automatically be reset with reading the error counter high byte.
If FMR1.ECM is set every second (interrupt ISR3.SEC) the error
counter will be latched and then automatically reset. The latched error
counter state should be read within the next second.
164
Operational Description E1
0
0
EB0
EB8
PEB 22554
(x56)
(x57)
09.98