PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 190

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PEB22554

Manufacturer Part Number
PEB22554
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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Pin Definitions and Function (cont’d)
Pin No.
85
84
86
46
Semiconductor Group
Symbol
RD/DS
WR/RW
CS
RES
Input (I)
Output (O)
I
I
I
I
Function
Read Enable (Siemens/Intel bus mode)
This signal indicates a read operation. When the
QuadFALC is selected via CS the RD signal
enables the bus drivers to output data from an
internal register addressed via A0 … A9 on to
Data Bus. For more information about
control/status register and FIFO access in the
different bus interface modes refer to chapter 7.2.
Data Strobe (Motorola bus mode)
This pin serves as input to control read/write
operations.
Write Enable (Siemens/Intel bus mode)
This signal indicates a write operation. When CS
is active the QuadFALC loads an internal register
with data provided via the Data Bus. For more
information about control/status register and FIFO
access in the different bus interface modes refer
to chapter 7.2.
Read/Write Enable (Motorola bus mode)
This signal distinguishes between read and write
operation.
Chip Select
A low signal selects the QuadFALC for read/write
operations.
Reset
A low signal on this pin forces the QuadFALC into
reset state. During Reset the QuadFALC needs an
active clock on pin MCLK.
During Rese all bi-directional output stages (data
bus) are in high-impedance state if signal RD is
“high”.
190
General Features T1
PEB 22554
09.98

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