PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 44

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Framer/Synchronizer
The following functions are performed:
• Synchronization on pulse frame and multiframe
• Error indication when synchronization is lost. In this case, AIS is automatically sent to
• Initiating and controlling of resynchronization after reaching the asynchronous state.
• Detection of remote alarm indication from the incoming data stream.
• Separation of service bits and data link bits. This information is stored in status
• Generation of various maskable interrupt statuses of the receiver functions.
• Generation of control signals to synchronize the CRC checker, and the receive elastic
If programmed and applicable to the selected multiframe format, CRC checking of the
incoming data stream is done by generating check bits for a CRC submultiframe
according to the CRC 4 procedure (refer to ITU-T Rec. G704). These bits are compared
with those check bits that are received during the next CRC submultiframe. If there is at
least one mismatch, the CRC error counter (16 bit) will be incremented.
Receive Elastic Buffer
The received bit stream is stored in the receive elastic buffer. The memory is organized
as a two-frame elastic buffer with a maximum size of 64
buffer can be independently configured for the receive and transmit direction.
Programming of the receive buffer size is done by SIC1.RBS1/0 :
• RBS1/0 = 00 : two frame buffer or 512 bits
• RBS1/0 = 01 : one frame buffer or 256 bits
• RBS1/0 = 10 : short buffer or 96 bits :
• RBS1/0 = 11 : Bypass of the receive elastic buffer
The functions are:
• Clock adaption between system clock (SCLKR) and internally generated route clock
• Compensation of input wander and jitter.
• Frame alignment between system frame and receive route frame
Semiconductor Group
the system side and Remote Alarm to the remote end if en/disabled.
This may be automatically done by the QuadFALC, or user controlled via the
microprocessor interface.
registers.
Maximum of wander amplitude (peak-to-peak): 190 UI (1 UI = 488 ns )
average delay after performing a slip: 1 frame or 256 bits
Max. wander amplitude: 100 UI
average delay after performing a slip: 128 bits, (SYPR = output)
Max. wander amplitude: 38 UI
average delay after performing a slip: 48 bits, (SYPR = output)
(RCLK).
buffer.
44
8 bit. The size of the elastic
Functional Description E1
PEB 22554
09.98