PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 350

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

COFA Event Counter (READ)
COEC
COE7…COE2… Multiframe Counter
COE1…COE0… Change of Frame Alignment Counter
Semiconductor Group
7
COE7
If GCR.ECMC = 1 this 6 bit counter increments with each multiframe
period in the asynchronous state FRS0.LFA/LMFA =1. The error
counter will not roll over.
If GCR.ECMC = 1 this 2 bit counter increments with each detected
change of frame / multiframe alignment. The error counter will not roll
over.
During alarm simulation, the counter is incremented once per
multiframe.
Clearing and updating the counter is done according to bit
FMR1.ECM.
If this bit is reset the error counter is permanently updated in the
buffer. For correct read access of the event counter bit DEC.DCOEC
has to be set. With the rising edge of this bit updating the buffer will
be stopped and the error counter will be reset. Bit DEC.DCOEC will
automatically be reset with reading the error counter high byte on
address 5B
If FMR1.ECM is set every second (interrupt ISR3.SEC) the error
counter will be latched and then automatically reset. The latched error
counter state should be read within the next second.
H
. Data read on 5B
350
H
is not defined.
Operational Description T1 / J1
COE2
COE1
0
COE0
PEB 22554
(x5A)
09.98