PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 143

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Semiconductor Group
Disable Error Counter (Write)
Value after RESET: 00
DEC
DRBD
DCEC3…
DCEC2…
DCEC1…
DEBC …
DCVC…
DFEC…
7
DRBD
Disable Receive Buffer Delay
This bit has to be set before reading the register RBD. It will be
automatically reset if RBD has been read.
Disable CRC Error Counter 3
Disable CRC Error Counter 2
Disable CRC Error Counter
Disable Errored Block Counter
Disable Code Violation Counter
Disable Framing Error Counter
These bits are only valid if FMR1.ECM is cleared. They have to be set
before reading the error counters. They will be automatically reset if
the corresponding error counter high byte has been read. With the
rising edge of these bits the error counters are latched and then
cleared.
H
DCEC3 DCEC2 DCEC1
143
DEBC
Operational Description E1
DCVC
0
DFEC
PEB 22554
(x60)
09.98