PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 183

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Quad Frame Aligner
• Frame alignment/synthesis for 1.544 MBit/s according to ITU-T G.704 and JT G.704
• Programmable formats : 4-Frame Multiframe (F4, FT), 12-Frame Multiframe (F12,
• Selectable conditions for recover and loss of frame alignment
• Performs synchronization in ESF format acc. to NTT requirements
• Error checking via CRC6 procedures according to ITU-T G. 706 and JT G. 706
• Supports the alternate CRC6 algorithm acc. to the ’japanese standard’ JT G. 706
• Alarm and performance monitoring per second
• Insertion and extraction of alarms (AIS, Remote (Yellow) Alarm, …)
• Yellow Alarm generation/checking according to ’japanese standard ’ JT-G.704
• IDLE code insertion for selectable channels
• Flexible system clock frequency different for receiver and transmitter
• Supports programmable system data rates: 2.048 , 4.096, 8.192, 16.384 MBit/s and
• Mux of 4 channels into a single rail 8.192 or 6.176 MBit/s data bus and v.v.
• Supports fractional T1 access
• Elastic store for receive and transmit route clock wander and jitter compensation;
• Programmable elastic buffer size: 2 frames / 1 frame / short buffer / bypass
• Provides different time-slot mapping modes
• Flexible transparent modes
• Programmable In-Band Loop Code detection / generation according to TR 62411
• Channel loop back , line loop back or Payload loop back capabilities (AT&T TR 54016)
• Pseudo random signal generator and monitor
• Support for different data link schemes
• Clear channel capabilities
Quad Signaling Controller
• HDLC controller
• DL-channel protocol for ESF format according to ANSI T1.403 specification or
• Robbed-bit signaling with last look capability, enhanced CAS-BR register access and
• Provides access to serial signaling data streams
Semiconductor Group
D3/4), Extended Superframe (ESF), Remote Switch Mode (F72, SLC96)
16 bit counter for CRC-, framing errors, code violations, Errored blocks, PRBS bit
errors
1.544, 3.088, 6.176, 12.352 MBit/s with independent receive / transmit shifts
Bit stuffing, CRC check and generation, flag generation, flag and address recognition,
handling of bit oriented functions
freeze signaling indication
with byte - or bitinterleaved formats
controlled slip capability and slip indication;
according to AT&T TR54016.
183
General Features T1
PEB 22554
09.98