PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 351

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Receive DL-Bit Register 1 (Read)
RDL1
RDL17…RDL10…Receive DL-Bit
Receive DL-Bit Register 2 (Read)
RDL2
RDL27…RDL20…Receive DL-Bit
Receive DL-Bit Register 3 (Read)
RDL3
RDL37…RDL30…Receive DL-Bit
Semiconductor Group
7
7
7
RDL17
RDL27
RDL37
Only valid if F12, F24 or F72 format is enabled.
The received FS/DL-Bits are shifted into this register. RDL10 is
received in frame 1 and RDL17 in frame 15, if F24 format is enabled.
RDL10 is received in frame 26 and RDL17 in frame 40, if F72 format
is enabled.
In F12 format the FS-Bits of a complete multiframe is stored in this
register. RDL10 is received in frame 2 and RDL15 in frame 12.
This register will be updated with every receive multiframe begin
interrupt ISR0.RMB.
Only valid if F24 or F72 format is enabled.
The received DL-Bits are shifted into this register. RDL20 is received
in frame 17 and RDL23 in frame 23, if F24 format is enabled. RDL20
is received in frame 42 and RDL27 in frame 56, if F72 format is
enabled.
This register will be updated with every receive multiframe begin
interrupt ISR0.RMB.
Only valid if F72 format is enabled.
The received DL-Bits are shifted into this register. RDL30 is received
in frame 58 and RDL37 in frame 72, if F72 format is enabled.
This register will be updated with every receive multiframe begin
interrupt ISR0.RMB.
RDL16
RDL26
RDL15
RDL25
RDL14
RDL24
351
RDL13
RDL23
RDL12
RDL22
Operational Description T1 / J1
RDL11
RDL21
0
0
0
RDL10
RDL20
RDL30
PEB 22554
(x5C)
(x5D)
(x5E)
09.98