PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 86

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PEB22554

Manufacturer Part Number
PEB22554
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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Only the high byte of a 2-byte address field will be compared with registers RAH1/2. The
whole frame excluding the first address byte will be stored in RFIFO.
Transparent Mode 0 (MODE.MDS2-0=100)
Characteristics: FLAG - and CRC generation/check, bit-stuffing
No address recognition is performed and each frame will be stored in the RFIFO.
Receive Data Flow
The following figure gives an overview of the management of the received HDLC frames
in the different operating modes.
Figure 29
Receive Data Flow of QuadFALC
Semiconductor Group
Description of Symbols:
MODE
0
0
1
1
.
1
1
0
0
MDS2
Compared with (register)
Processed autonomously
Stored (FIFO,
-
1
0
1
0
0
Non
Auto/16
Non
Auto/8
Transparent
Transparent
register)
FLAG
1
0
RAH1,
RAH1, 2
RAL1, 2
2)
2)
2)
ADDR
2
RAL1,
Note:
2)
X
1)
2)
2
In case of on 8 Bit Address,
the Control Field starts here!
CRC optionally stored in RFIFO
if CCR3
Address optionally stored in RFIFO
if CCR3
86
CTRL
.
.
RCRC
RADD
=
=
"1".
"1".
RFIFO
RFIFO
RFIFO
RFIFO
Operational Description E1
1)
1)
1)
RSIS
RSIS
RSIS
RSIS
CRC
ITD06455
PEB 22554
FLAG
09.98

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