Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 115

• Manufacturer Part Number: Z32AN00NW200SG
• Description: IC ARM922T MCU 200MHZ 256-BGA
• Manufacturer: Zilog
• Series: Encore!® 32r

Specifications of Z32AN00NW200SG

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
• Peripherals: DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• For Use With: 269-4713 - KIT DEV ENCORE 32 SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 269-4717

Z32AN Series Data Sheet
12.2.2 Offset 004h: RNG_CTRL – Random Number Generator Control Register
DS0200-003
31:07
Bits
06
05
04
03
02
01
00
Type
WO
RW
RW
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
Description
Reserved
IRQ Status (IRQ): Set when GRANT is set, and IRQ_EN was ‘1’.
Grant (GRANT):
RNG_DATA. This goes active some time after REQUEST is set. Once set, it remains set
until REQUEST is cleared.
Reserved
IRQ Clear (IRQ_CLR): Writing 1 to this bit causes the IRQ to be cleared. Any write
with this bit set does not affect other bits of this register. Writes of ‘0’ have no effect.
IRQ Enable (IRQ_EN):
transitions to 1. Any write to RNG_CTRL with the IRQ CLR bit set do not affect this bit.
Request (REQUEST): When set, initiates generation of a new random number. After
this bit is set, GRANT indicates a new random number is available. Once GRANT is set
to ‘1’, this bit must be cleared. Clearing REQUEST will have following two effects:
Reserved
 GRANT is cleared.
 The contents of RNG_DATA are cleared. Any write to RNG_CTRL with IRQ_CLR
set do not affect this bit.
When set, indicates a new random number is available in
When set, enables IRQ to go active when a GRANT
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