Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 14

• Manufacturer Part Number: Z32AN00NW200SG
• Description: IC ARM922T MCU 200MHZ 256-BGA
• Manufacturer: Zilog
• Series: Encore!® 32r

Specifications of Z32AN00NW200SG

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
• Peripherals: DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• For Use With: 269-4713 - KIT DEV ENCORE 32 SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 269-4717

Z32AN Series Data Sheet
Chapter 1: Pin Description
1.1
1.2
1.3
DS0200-003
Pin Name
Pin Name
Pin Name
System Pins
External Bus Interface
Secondary External Bus Interface
DQM[1:0]
nRSTOUT
MA[23:0]
MD[15:0]
SD[15:0]
nCS[9:6]
nCS[5:0]
SA[23:0]
nRSTIN
nSWEU
CLKXO
READY
nSWEL
SDCLK
CLKXI
nWEU
nWEL
nSOE
nRAS
nCAS
nWE
nOE
CKE
O, I/O
Dir
Dir
I/O
Dir
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
Function
System Reset: Schmitt trigger input.
Reset Out: 4mA drive.
System Clock Oscillator Input
System Clock Oscillator Output
Function
Memory Chip Selects [9:6]: 4mA drive. Multiplexed with GPIO_0[19:16] (nCS[9]
multiplexed with GPIO_0[19], etc.). After reset, these pins default as chip selects.
Memory Chip Selects [5:0]:
memory chip select.
Primary Write Strobe: 8mA drive.
Primary Write Strobe: 8mA drive.
Primary Output Enable: 8mA drive.
Primary Address Bus:
(MA[23] multiplexed with GPIO_0[23], etc.). MA[23:20] are I/O when in GPIO mode.
At reset, MA[23:20] default as address pins.
Primary Data Bus: 8mA drive.
SDRAM Clock: 4mA drive.
Ready Input: 4mA drive. Multiplexed with GPIO_0[26]. At reset, this pin defaults to
GPIO.
Function
SDRAM Clock Enable for Secondary Bus: 4mA drive.
Secondary Write Strobe: 4mA drive.
Secondary Write Strobe: 4mA drive.
Secondary Output Enable: 4mA drive.
Secondary Bus Address: 4mA drive.
Secondary Bus Data: 4mA drive.
SDRAM Row Address Strobe: 4mA drive.
SDRAM Column Address Strobe: 4mA drive.
SDRAM Write Enable: 4mA drive.
SDRAM Data Mask: 4mA drive.
8mA drive.
4mA drive.
MA[23:20] multiplexed with GPIO_0[23:20]
nCS[0] is used as the external boot
Page 1