Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 131

• Manufacturer Part Number: Z32AN00NW200SG
• Description: IC ARM922T MCU 200MHZ 256-BGA
• Manufacturer: Zilog
• Series: Encore!® 32r

Specifications of Z32AN00NW200SG

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
• Peripherals: DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• For Use With: 269-4713 - KIT DEV ENCORE 32 SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 269-4717

Z32AN Series Data Sheet
16.2.1.6
16.2.1.7
DS0200-003
In Compare mode, the timer counts up to the 16-bit maximum Compare value stored in the Timer Compare
register. The timer input is the hclk. Upon reaching the Compare value, the timer generates an interrupt and
counting continues (the timer value is not reset to 0001H). Also, if the Timer Output function is enabled (in
the GPIO), the Timer Output pin changes state (from Low to High or from High to Low) upon Compare.
When the Timer reaches FFFFh, the timer rolls over to 0000H and continues counting.
The steps for configuring a timer for Compare mode and initiating the count are as follows:
In Compare mode, the hclk always provides the timer input. The Compare time is given by the following
equation:
In Gated mode, the timer counts only when the Timer Input signal is in its active state (asserted), as
determined by the TPOL bit in the Timer Control register. When the Timer Input signal is asserted, counting
begins. A timer interrupt is generated when the Timer Input signal is de-asserted or a Timer Compare
occurs.
The timer counts up to the 16-bit Compare value stored in the Timer Compare register. The timer input is the
hclk. When reaching the Compare value, the timer generates an interrupt, the count value in the Timer
register is reset to 0001H and counting resumes (assuming the Timer Input signal is still asserted). Also, if
the Timer Output function is enabled (in the GPIO), the Timer Output pin changes state (from Low to High
or from High to Low) at Timer Compare.
The steps for configuring a timer for Gated mode and initiating the count are as follows:
If using the Timer Output function, configure the associated GPIO port pin for the Timer Output function.
(See chapter covering GPIO herein.)
Compare Mode
Gated Mode
1.
2.
3.
4.
5.
6.
1.
2.
3.
4.
5.
6.
7.
Clear TxCTL.TEN, Write TxCTL.TMODE to “101”, and set TxCTL.PRES. If using the timer
output function, set the initial output level via TPOL:
Write to the Timer register to set the starting count value.
Write to the Timer Compare register to set the Compare value.
If desired, enable the timer interrupt (via the Interrupt Mask Register in the Interrupt Controller)
and set the timer interrupt priority (by writing to the appropriate Configuration Table Register in
the Interrupt Controller herein).
If using the Timer Output function, configure the associated GPIO port pin for the Timer Output
function. (See chapter covering GPIO herein.)
Write to the Timer Control register to enable the timer and initiate counting (TEN = “1”).
Clear TxCTL.TEN, Write TxCTL.TMODE to “110”, and set TxCTL.PRES:
Write to the Timer register to set the starting count value. This only affects the first pass in
Gated mode. After the first timer reset in Gated mode, counting always begins at the reset
value of 0001H.
Write to the Timer Compare register to set the Compare value.
If desired, enable the timer interrupt (via the Interrupt Mask Register in the Interrupt Controller)
and set the timer interrupt priority (by writing to the appropriate Configuration Table Register in
the Interrupt Controller herein).
Configure the associated GPIO port pin for the Timer Input function.
Write to the Timer Control register to enable the timer (TEN = “1”).
Assert the Timer Input signal to initiate the counting (High if TPOL = “0”; Low if TPOL = “1”).
Page 118