Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 22

• Manufacturer Part Number: Z32AN00NW200SG
• Description: IC ARM922T MCU 200MHZ 256-BGA
• Manufacturer: Zilog
• Series: Encore!® 32r

Specifications of Z32AN00NW200SG

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
• Peripherals: DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• For Use With: 269-4713 - KIT DEV ENCORE 32 SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 269-4717

Z32AN Series Data Sheet
3.1
3.1.1
3.1.1
3.1.2
3.1.3
3.2
DS0200-003
Wait-for-IRQ
Battery Back
ARM922T
Mode
STOP
HALT
IDLE
Up
Power Modes
This is an intrinsic function of the ARM922T. The ARM922T contains a Wait for Interrupt mechanism within
the CP15 registers to put the ARM922T in a low power state until the arrival of an IRQ or FIQ. More
information can be found in the ARM922T Technical Reference Manual.
state, turn off any unnecessary clocks in PMU_CLK_EN to further reduce power. In this mode, the INTC
and any peripherals expected to generate interrupts should be left enabled. All other enables may be off.
In this mode all clocks are disabled. The PLL and crystal continue to run for fast return to full active
operation. The return to active mode is achieved by transitions on selected GPIO, RTC alarm or USB wake.
To enter this mode, power down the peripherals and select the wake mechanisms in PMUCFG and turn off
the clocks in PMU_CLK_EN.
In this mode, all the clocks, PLL, and Crystal are disabled. Return to active mode is achieved by transition
on selected GPIO, RTC alarm or USB wake. This mode requires an additional delay to active mode while
the crystal starts and PLL re-locks. To enter the this mode, power down the peripherals, select the wake
mechanisms and disable XTAL with one write to PMUCFG. Once XTAL disabled, the clocks stop. Normal
operation is resumed when the one of the selected wake mechanisms occurs and the delay for XTAL
stabilization has elapsed.
The system is in battery back up mode when all power is removed except the battery. In this mode, the RTC
continues to operate. Return to active is achieved by applying valid system power. Resuming normal
operation is automatic with the ROM boot sequence occurring.
Wake Mechanisms
HALT - ARM922 Wait for Interrupt
IDLE
STOP
Battery Back Up


CP15 of ARM922T
power is removed
GPIO Wake: This can be used to return to active operation from Idle or Stop Modes. All GPIO
modules can be configured to wake in the event of a GPIO input edge by setting
GPIO_WAKE_EN. See section Chapter 20: for more details.
RTC Wake: The RTC alarm can also be used to return to active operation from Idle or Stop
Modes. The PMU can be configured to “wake” the PMU clocks upon activation of the RTC
alarm. See section Chapter 11: for more details.
Automatic when
PMU_CFG and
PMU_CLK_EN
Initiation
PMU_CFG
selected GPIO inputs
or RTC Alarm or USB
selected GPIO inputs
or RTC Alarm or USB
IRQ or FIQ active
into ARM922T
Transition on
Transition on
Wake
wake
wake
POR
Restrictions
Clock must remain active to the INTC. The clocks of other
modules can be deactivated in the PMU to reduce dynamic
power consumption. Clocks for modules expected to generate
interrupts should be left enabled.
None. All clocks can be disabled but the PLL and Crystal
continue to run.
None. All clocks are disabled and the PLL and Crystal are
disabled.
None. Only the RTC remains active. Normal operation resumes
when power is returned to the system.
Prior to placing the CPU in this
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