Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 9

• Manufacturer Part Number: Z32AN00NW200SG
• Description: IC ARM922T MCU 200MHZ 256-BGA
• Manufacturer: Zilog
• Series: Encore!® 32r

Specifications of Z32AN00NW200SG

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
• Peripherals: DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• For Use With: 269-4713 - KIT DEV ENCORE 32 SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 269-4717

Z32AN Series Data Sheet
DS0200-003
Chapter 16: Timers ...................................................................................................... 113
Chapter 17: Universal Asynchronous Receiver/Transmitter (UART) ....................... 128
Chapter 18: Serial Peripheral Interface (SPI)............................................................ 143
16.1 Watchdog Timer (WDT).................................................................................................................... 113
16.2 16-bit PWM Timers (Timers 3 to 0).................................................................................................... 115
16.3 32-bit Timers (Timers 8 to 4).............................................................................................................. 123
17.1 Functional Description ..................................................................................................................... 128
17.2 UART Usage ........................................................................................................................................ 130
17.3 Baud Rate Generator (BRG)........................................................................................................... 131
17.4 Infrared Encoder/Decoder (UART2 only)...................................................................................... 131
17.5 Registers (Base: UART0→FFFE000h, UART1→FFFE100h, UART2→FFFE200h) .............................. 134
18.1 Operation........................................................................................................................................... 144
18.2 Signals ................................................................................................................................................. 144
18.3 Clock Phase and Polarity Control.................................................................................................. 145
18.4 Multi-Master Operation.................................................................................................................... 147
18.5 Slave Operation ................................................................................................................................ 147
15.5.3 Offset 008h: LCD_WR – LCD Write Register ..................................................................112
16.1.1 Enabling...........................................................................................................................113
16.1.2 Time Delay Period Selection..........................................................................................113
16.1.3 Registers (Base → FFFEC000h) .......................................................................................114
16.2.1 Operation........................................................................................................................115
16.2.2 Timer Input/Output Polarity Bit Modes (TxCTL.TPOL) ...................................................119
16.2.3 Reading the Timer Count Values ..................................................................................120
16.2.4 Timer Output Signal Operation .....................................................................................120
16.2.5 Registers (TMR0→FFFE3000h, TMR1→FFFE4000h, TMR2→FFFE5000h, TMR3→FFFE6000h)
16.3.1 Operation........................................................................................................................123
16.3.2 Timer Operating Modes .................................................................................................123
16.3.3 UART Mode .....................................................................................................................125
16.3.4 Reading the Timer Count Values ..................................................................................125
16.3.5 Registers (Base: TMR4→FFFE7000h, TMR5→FFFE8000h, TMR6→FFFE9000h,
TMR7→FFFEA000h, TMR8→FFFEB000h) .......................................................................................126
17.1.1 UART Transmitter .............................................................................................................128
17.1.2 UART Receiver.................................................................................................................128
17.1.3 UART Modem Control ....................................................................................................129
17.1.4 UART Interrupts ................................................................................................................129
17.2.1 Control Transfers .............................................................................................................130
17.2.2 Data Transfers .................................................................................................................130
17.2.3 Poll Mode Transfers.........................................................................................................130
17.2.4 DMA mode Transfers ......................................................................................................131
17.4.1 IR Transmit........................................................................................................................132
17.4.2 IR Receive .......................................................................................................................132
17.4.3 IR Narrow Pulse Detection .............................................................................................132
17.4.4 IR Jitter .............................................................................................................................133
17.4.5 IR Infrared Encoder/Decoder Signal Pins .....................................................................133
17.4.6 IR Loopback Testing .......................................................................................................133
17.5.1 Baud Rate Generator Registers ....................................................................................134
17.5.2 UART Registers.................................................................................................................134
18.2.1 Master-In/Slave-Out (MISO)...........................................................................................144
18.2.2 Master-Out/Slave-In (MOSI)...........................................................................................144
18.2.3 Serial Clock (SCK) ...........................................................................................................144
18.2.4 Slave Select (nSS) ...........................................................................................................145
18.3.1 Transfer Format (SPI_CTL.PHASE = 0) .............................................................................145
18.3.2 Transfer Format (SPI_CTL.PHASE = 1) .............................................................................147
120
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