Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 130
![IC ARM922T MCU 200MHZ 256-BGA](/photos/12/45/124543/z32an00nw200sg_sml.jpg)
Z32AN00NW200SG
Manufacturer Part Number
Z32AN00NW200SG
Description
IC ARM922T MCU 200MHZ 256-BGA
Manufacturer
Zilog
Series
Encore!® 32r
Datasheet
1.Z32AN00NW200SG.pdf
(196 pages)
Specifications of Z32AN00NW200SG
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
Peripherals
DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
For Use With
269-4713 - KIT DEV ENCORE 32 SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Other names
269-4717
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Manufacturer
Quantity
Price
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Z32AN Series Data Sheet
16.2.1.5
DS0200-003
The PWM period is given by the following equation:
If an initial starting value other than 0001H is loaded into the Timer register, the One-Shot mode equation
must be used to determine the first PWM time-out period.
If TPOL is set to “0”, the ratio of the PWM output High time to the total period is given by:
If TPOL is set to “1”, the ratio of the PWM output High time to the total period is given by:
In Capture mode, the current timer count value is recorded when the desired external Timer Input transition
occurs. The Capture count value is written to the Timer PWM register. The timer input is the hclk. The TPOL
bit in the Timer Control register determines if the Capture occurs on a rising edge (TPOL = “0”) or a falling
edge (TPOL = “1”) of the Timer Input signal. When the Capture event occurs, an interrupt is generated, and
the timer continues counting.
The timer continues counting up to the 16-bit Compare value stored in the Timer Compare register. Upon
reaching the Compare value, the timer generates an interrupt and counting continues.
The steps for configuring a timer for Capture mode and initiating the count are as follows:
In Capture mode, the elapsed time from timer start to Capture event can be calculated using the following
equation:
Capture Mode
3.
4.
5.
6.
7.
1.
2.
3.
4.
5.
6.
Write to the PWM register to set the Match value.
Write to the Timer Compare register to set the Compare value. The Compare value must be
greater than the PWM value.
If desired, enable the timer interrupt (via the Interrupt Mask Register in the Interrupt Controller)
and set the timer interrupt priority (by writing to the appropriate Configuration Table Register in
the Interrupt Controller herein).
Configure the associated GPIO port pin for the Timer Output function. (See chapter covering
GPIO herein.)
Write to the Timer Control register to enable the timer and initiate counting (TEN = “1”).
Clear TxCTL.TEN, Write TxCTL.TMODE to “100”, and set TxCTL.PRES. Select the capture
edge for the timer input via TPOL
Write to the Timer register to set the starting count value (typically 0001H).
Write to the Timer Compare register to set the Compare value.
If desired, enable the timer interrupt (via the Interrupt Mask Register in the Interrupt Controller)
and set the timer interrupt priority (by writing to the appropriate Configuration Table Register in
the Interrupt Controller herein).
Configure the associated GPIO port pin for the Timer Input function.
Write to the Timer Control register to enable the timer and initiate counting (TEN = “1”).
Page 117
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