Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 20

• Manufacturer Part Number: Z32AN00NW200SG
• Description: IC ARM922T MCU 200MHZ 256-BGA
• Manufacturer: Zilog
• Series: Encore!® 32r

Specifications of Z32AN00NW200SG

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
• Peripherals: DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• For Use With: 269-4713 - KIT DEV ENCORE 32 SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 269-4717

Z32AN Series Data Sheet
Chapter 2: Reset
2.1
2.2
2.3
DS0200-003
The Z32AN Series provides 3 types of reset operations: System Reset, Hard Reset, and Peripheral Reset
System Reset
A system reset is caused by a Hard Reset or a Soft Reset. A system reset resets all modules except the
Power Management Unit (PMU) and Watchdog Timer. A system reset is driven out onto the nRSTOUT pin.
Hard Reset
A hard reset is caused by the reset input pin, an internal Power-on reset or Watchdog time-out. A hard reset
will reset all digital modules of the device.
The hard reset is asserted asynchronously by any of its sources. The hard reset is released synchronously
to the CLKXI oscillator input after all reset sources have been inactive for 16 clock cycles.
Peripheral Reset
A peripheral reset is caused by a system or peripheral reset. This resets all APB peripherals, except the
PMU, Watchdog Timer, and GPIO. This does not reset any AHB device (such as the CPU, Bridge, EBI,
DMA, etc.). The source(s) of a reset are logged within PMURESET. nRSTIN is run through a glitch filter to
improve noise immunity.
Figure 2-1: Reset Module Block Diagram
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