Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 132

• Manufacturer Part Number: Z32AN00NW200SG
• Description: IC ARM922T MCU 200MHZ 256-BGA
• Manufacturer: Zilog
• Series: Encore!® 32r

Specifications of Z32AN00NW200SG

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
• Peripherals: DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• For Use With: 269-4713 - KIT DEV ENCORE 32 SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 269-4717

Z32AN Series Data Sheet
16.2.1.8
16.2.2 Timer Input/Output Polarity Bit Modes (TxCTL.TPOL)
DS0200-003
In Capture/Compare mode, the timer begins counting after the first desired external Timer Input transition
occurs. The desired transition (rising edge or falling edge) is set by the TPOL bit in the Timer Control
Register. The timer input is the hclk.
Every subsequent desired transition (after the first) of the Timer Input signal captures the current count
value. The Captured timer value is written to the Timer PWM register. When the Capture event occurs, an
interrupt is generated, the count value in the Timer register is reset to 0001H, and counting resumes.
If no Capture event occurs, the timer counts up to the 16-bit Compare value stored in the Timer Compare
register. Upon reaching the Compare value, the timer generates an interrupt, the count value in the Timer
register is reset to 0001H, and counting resumes.
The steps for configuring a timer for Capture/Compare mode and initiating the count are as follows:
In Capture/Compare mode, the elapsed time from timer start to Capture event can be calculated using the
following equation:
TxCTL.TPOL is a function of TxCTL.TMODE, which can be set for 1 of the following 8 modes:
Capture/Compare Mode
1.
2.
3.
4.
5.
6.
7.





Clear TxCTL.TEN, Write TxCTL.TMODE to “100”, and set TxCTL.PRES. Select the capture
edge for the timer input via TPOL
Write to the Timer register to set the starting count value (typically 0001H).
Write to the Timer Compare register to set the Compare value.
If desired, enable the timer interrupt (via the Interrupt Mask Register in the Interrupt Controller)
and set the timer interrupt priority (by writing to the appropriate Configuration Table Register in
the Interrupt Controller herein).
Configure the associated GPIO port pin for the Timer Input function.
Write to the Timer Control register to enable the timer (TEN = “1”).
Counting begins after the first desired transition of the Timer Input signal. No interrupt is
generated by this first edge.
One-Shot Mode: When the timer is disabled, the Timer Output signal is set to the value of
TPOL. When the timer is enabled, the Timer Output signal is complemented (changes state
from Low-to-High or High-to-Low) upon Timer Reload.
Continuous Mode: When the timer is disabled, the Timer Output signal is set to the value of
TPOL. When the timer is enabled, the Timer Output signal is complemented (changes state
from Low-to-High or High-to-Low) upon Timer Reload.
Counter Mode: When the timer is disabled, the Timer Output signal is set to the value of
TPOL. When the timer is enabled, the Timer Output signal is complemented (changes state
from Low-to-High or High-to-Low) upon Timer Reload.
o
o
PWM Mode
o
o
Capture Mode:
o
o
TPOL = “0”: Count occurs on the rising edge of the Timer Input signal.
TPOL = “1”: Count occurs on the falling edge of the Timer Input signal.
TPOL = “0”: Timer Output is forced Low (“0”) when the timer is disabled. When enabled,
the Timer Output is forced High (“1”) upon PWM count match and forced Low (“0”) upon
Reload.
TPOL = “1”: Timer Output is forced High (“1”) when the timer is disabled. When enabled,
the Timer Output is forced Low (“0”) upon PWM count match and forced High (“1”) upon
Reload.
TPOL = “0”: Count is captured on the rising edge of the Timer Input signal.
TPOL = “1”: Count is captured on the falling edge of the Timer Input signal.
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